patch-2.4.18 linux/include/asm-ppc/keylargo.h

• Lines: 135
• Date: Mon Feb 4 18:47:24 2002
• Orig file: linux.orig/include/asm-ppc/keylargo.h
• Orig date: Mon Feb 18 20:18:40 2002

diff -Naur -X /home/marcelo/lib/dontdiff linux.orig/include/asm-ppc/keylargo.h linux/include/asm-ppc/keylargo.h
@@ -1,5 +1,5 @@
 /*
- * BK Id: SCCS/s.keylargo.h 1.13 08/19/01 22:23:04 paulus
+ * BK Id: SCCS/s.keylargo.h 1.17 01/20/02 23:53:12 benh
  */
 /*
  * keylargo.h: definitions for using the "KeyLargo" I/O controller chip.
@@ -27,14 +27,18 @@
 #define KEYLARGO_GPIO_EXTINT_CNT	18
 #define KEYLARGO_GPIO_0			0x6A
 #define KEYLARGO_GPIO_CNT		17
+#define KEYLARGO_GPIO_EXTINT_DUAL_EDGE	0x80
 #define KEYLARGO_GPIO_OUTPUT_ENABLE	0x04
 #define KEYLARGO_GPIO_OUTOUT_DATA	0x01
+#define KEYLARGO_GPIO_INPUT_DATA	0x02
 
 /* Specific GPIO regs */
 
-#define KL_GPIO_MODEM_RESET		(KEYLARGO_GPIO_0+0x03) /* Pangea */
+#define KL_GPIO_MODEM_RESET		(KEYLARGO_GPIO_0+0x03)
 #define KL_GPIO_MODEM_POWER		(KEYLARGO_GPIO_0+0x02) /* Pangea */
 
+#define KL_GPIO_SOUND_POWER		(KEYLARGO_GPIO_0+0x05)
+
 /* Hrm... this one is only to be used on Pismo. It seeem to also
  * control the timebase enable on other machines. Still to be
  * experimented... --BenH.
@@ -54,7 +58,9 @@
 #define KL_GPIO_RESET_CPU3		(KEYLARGO_GPIO_EXTINT_0+0x10)
 
 #define KL_GPIO_PMU_MESSAGE_IRQ		(KEYLARGO_GPIO_EXTINT_0+0x09)
-#define KL_GPIO_PMU_MESSAGE_BIT		0x02
+#define KL_GPIO_PMU_MESSAGE_BIT		KEYLARGO_GPIO_INPUT_DATA
+
+#define KL_GPIO_MEDIABAY_IRQ		(KEYLARGO_GPIO_EXTINT_0+0x0e)
 
 #define KL_GPIO_AIRPORT_0		(KEYLARGO_GPIO_EXTINT_0+0x0a)
 #define KL_GPIO_AIRPORT_1		(KEYLARGO_GPIO_EXTINT_0+0x0d)
@@ -65,43 +71,47 @@
 /*
  * Bits in feature control register
  */
-#define KL_MBCR_MB0_DEV_ENABLE		0x00001000
+#define KL_MBCR_MB0_PCI_ENABLE		0x00000800	/* exist ? */
+#define KL_MBCR_MB0_IDE_ENABLE		0x00001000
+#define KL_MBCR_MB0_FLOPPY_ENABLE	0x00002000	/* exist ? */
+#define KL_MBCR_MB0_SOUND_ENABLE	0x00004000	/* hrm... */
+#define KL_MBCR_MB0_DEV_MASK		0x00007800
 #define KL_MBCR_MB0_DEV_POWER		0x00000400
 #define KL_MBCR_MB0_DEV_RESET		0x00000200
 #define KL_MBCR_MB0_ENABLE		0x00000100
-#define KL_MBCR_MB1_DEV_ENABLE		0x10000000
+#define KL_MBCR_MB1_PCI_ENABLE		0x08000000	/* exist ? */
+#define KL_MBCR_MB1_IDE_ENABLE		0x10000000
+#define KL_MBCR_MB1_FLOPPY_ENABLE	0x20000000	/* exist ? */
+#define KL_MBCR_MB1_SOUND_ENABLE	0x40000000	/* hrm... */
+#define KL_MBCR_MB1_DEV_MASK		0x78000000
 #define KL_MBCR_MB1_DEV_POWER		0x04000000
 #define KL_MBCR_MB1_DEV_RESET		0x02000000
 #define KL_MBCR_MB1_ENABLE		0x01000000
 
-#define KL0_SCC_B_INTF_ENABLE		0x00000001	/* ??? */
-#define KL0_SCC_A_INTF_ENABLE		0x00000002	/* ??? */
+#define KL0_SCC_B_INTF_ENABLE		0x00000001
+#define KL0_SCC_A_INTF_ENABLE		0x00000002
 #define KL0_SCC_SLOWPCLK		0x00000004
 #define KL0_SCC_RESET			0x00000008
 #define KL0_SCCA_ENABLE			0x00000010
 #define KL0_SCCB_ENABLE			0x00000020
 #define KL0_SCC_CELL_ENABLE		0x00000040
+#define KL0_IRDA_HIGH_BAND		0x00000100
+#define KL0_IRDA_SOURCE2_SEL		0x00000200
+#define KL0_IRDA_SOURCE1_SEL		0x00000400
+#define KL0_IRDA_RESET			0x00000800
+#define KL0_IRDA_DEFAULT1		0x00001000
+#define KL0_IRDA_DEFAULT0		0x00002000
+#define KL0_IRDA_FAST_CONNECT		0x00004000
+#define KL0_IRDA_ENABLE			0x00008000
+#define KL0_IRDA_CLK32_ENABLE		0x00010000
+#define KL0_IRDA_CLK19_ENABLE		0x00020000
 #define KL0_USB0_PAD_SUSPEND0		0x00040000
 #define KL0_USB0_PAD_SUSPEND1		0x00080000
 #define KL0_USB0_CELL_ENABLE		0x00100000
 #define KL0_USB1_PAD_SUSPEND0		0x00400000
 #define KL0_USB1_PAD_SUSPEND1		0x00800000
 #define KL0_USB1_CELL_ENABLE		0x01000000
-/* KL id 0x22 only */
 #define KL0_USB_REF_SUSPEND		0x10000000
-#define KL0_IRDA_ENABLE			0x00008000
-#define KL0_IRDA_CLK32_ENABLE		0x00010000
-#define KL0_IRDA_CLK19_ENABLE		0x00020000
-/* KL id 0x25 (pangea) only */
-#define KL0_USB1_PAD_SUSPEND_SEL	0x00020000
-#define KL0_USB1_REF_SUSPEND		0x00010000
-#define KL0_USB1_REF_SUSPEND_SEL	0x00008000
-#define KL0_USB1_PMI			0x00004000
-#define KL0_USB0_PAD_SUSPEND_SEL	0x00002000
-#define KL0_USB0_REF_SUSPEND		0x00001000
-#define KL0_USB0_REF_SUSPEND_SEL	0x00000800
-#define KL0_USB0_PMI			0x00000400
-
 
 #define KL0_SERIAL_ENABLE		(KL0_SCC_B_INTF_ENABLE | \
 					KL0_SCC_SLOWPCLK | \
@@ -128,8 +138,9 @@
 #define KL2_IOBUS_ENABLE		0x00000002
 #define KL2_SLEEP_STATE_BIT		0x00000100
 #define KL2_MPIC_ENABLE			0x00020000
-#define KL2_MODEM_POWER_N		0x02000000
-#define KL2_AIRPORT_RESET_N		0x08000000	/* Or power ? */
+#define KL2_ALT_DATA_OUT		0x02000000
+#define KL2_MEM_IS_BIG			0x04000000
+#define KL2_CARDSEL_16			0x08000000
 
 #define KL3_SHUTDOWN_PLL_TOTAL		0x00000001
 #define KL3_SHUTDOWN_PLLKW6		0x00000002
@@ -149,11 +160,11 @@
 #define KL3_STOPPING33_ENABLED		0x00080000
 
 /* Port 0,1 : bus 0, port 2,3 : bus 1 */
-#define KL4_SET_PORT_ENABLE(p)		(0x00000008 << ((p)<<3))
-#define KL4_SET_PORT_RESUME(p)		(0x00000004 << ((p)<<3))
-#define KL4_SET_PORT_CONNECT(p)		(0x00000002 << ((p)<<3))
-#define KL4_SET_PORT_DISCONNECT(p)	(0x00000001 << ((p)<<3))
-#define KL4_GET_PORT_RESUME(p)		(0x00000040 << ((p)<<3))
-#define KL4_GET_PORT_CONNECT(p)		(0x00000020 << ((p)<<3))
-#define KL4_GET_PORT_DISCONNECT(p)	(0x00000010 << ((p)<<3))
+#define KL4_PORT_WAKEUP_ENABLE(p)	(0x00000008 << ((p)<<3))
+#define KL4_PORT_RESUME_WAKE_EN(p)	(0x00000004 << ((p)<<3))
+#define KL4_PORT_CONNECT_WAKE_EN(p)	(0x00000002 << ((p)<<3))
+#define KL4_PORT_DISCONNECT_WAKE_EN(p)	(0x00000001 << ((p)<<3))
+#define KL4_PORT_RESUME_STAT(p)		(0x00000040 << ((p)<<3))
+#define KL4_PORT_CONNECT_STAT(p)	(0x00000020 << ((p)<<3))
+#define KL4_PORT_DISCONNECT_STAT(p)	(0x00000010 << ((p)<<3))