patch-2.4.5 linux/drivers/parport/parport_pc.c
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- Lines: 660
- Date:
Tue May 22 19:54:04 2001
- Orig file:
v2.4.4/linux/drivers/parport/parport_pc.c
- Orig date:
Fri Apr 20 16:23:12 2001
diff -u --recursive --new-file v2.4.4/linux/drivers/parport/parport_pc.c linux/drivers/parport/parport_pc.c
@@ -12,6 +12,7 @@
* DMA support - Bert De Jonghe <bert@sophis.be>
* Many ECP bugs fixed. Fred Barnes & Jamie Lokier, 1999
* More PCI support now conditional on CONFIG_PCI, 03/2001, Paul G.
+ * Various hacks, Fred Barnes, 04/2001
*/
/* This driver should work with any hardware that is broadly compatible
@@ -117,7 +118,7 @@
unsigned char oecr;
int mode;
- DPRINTK("parport change_mode ECP-ISA to mode 0x%02x\n",m);
+ DPRINTK(KERN_INFO "parport change_mode ECP-ISA to mode 0x%02x\n",m);
if (!priv->ecr) {
printk (KERN_DEBUG "change_mode: but there's no ECR!\n");
@@ -211,6 +212,7 @@
/* Back to PS2 mode. */
frob_econtrol (p, 0xe0, ECR_PS2 << 5);
+ DPRINTK (KERN_DEBUG "*** get_fifo_residue: done residue collecting (ecr = 0x%2.2x)\n", inb (ECONTROL (p)));
return residue;
}
#endif /* IEEE 1284 support */
@@ -367,9 +369,60 @@
size_t length, int flags)
{
size_t got = 0;
+
+ if (flags & PARPORT_W91284PIC) {
+ unsigned char status;
+ size_t left = length;
+
+ /* use knowledge about data lines..:
+ * nFault is 0 if there is at least 1 byte in the Warp's FIFO
+ * pError is 1 if there are 16 bytes in the Warp's FIFO
+ */
+ status = inb (STATUS (port));
+
+ while (!(status & 0x08) && (got < length)) {
+ if ((left >= 16) && (status & 0x20) && !(status & 0x08)) {
+ /* can grab 16 bytes from warp fifo */
+ if (!((long)buf & 0x03)) {
+ insl (EPPDATA (port), buf, 4);
+ } else {
+ insb (EPPDATA (port), buf, 16);
+ }
+ buf += 16;
+ got += 16;
+ left -= 16;
+ } else {
+ /* grab single byte from the warp fifo */
+ *((char *)buf)++ = inb (EPPDATA (port));
+ got++;
+ left--;
+ }
+ status = inb (STATUS (port));
+ if (status & 0x01) {
+ /* EPP timeout should never occur... */
+ printk (KERN_DEBUG "%s: EPP timeout occured while talking to "
+ "w91284pic (should not have done)\n", port->name);
+ clear_epp_timeout (port);
+ }
+ }
+ return got;
+ }
+ if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
+ if (!(((long)buf | length) & 0x03)) {
+ insl (EPPDATA (port), buf, (length >> 2));
+ } else {
+ insb (EPPDATA (port), buf, length);
+ }
+ if (inb (STATUS (port)) & 0x01) {
+ clear_epp_timeout (port);
+ return -EIO;
+ }
+ return length;
+ }
for (; got < length; got++) {
*((char*)buf)++ = inb (EPPDATA(port));
- if (inb (STATUS(port)) & 0x01) {
+ if (inb (STATUS (port)) & 0x01) {
+ /* EPP timeout */
clear_epp_timeout (port);
break;
}
@@ -382,6 +435,19 @@
size_t length, int flags)
{
size_t written = 0;
+
+ if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
+ if (!(((long)buf | length) & 0x03)) {
+ outsl (EPPDATA (port), buf, (length >> 2));
+ } else {
+ outsb (EPPDATA (port), buf, length);
+ }
+ if (inb (STATUS (port)) & 0x01) {
+ clear_epp_timeout (port);
+ return -EIO;
+ }
+ return length;
+ }
for (; written < length; written++) {
outb (*((char*)buf)++, EPPDATA(port));
if (inb (STATUS(port)) & 0x01) {
@@ -397,6 +463,15 @@
size_t length, int flags)
{
size_t got = 0;
+
+ if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
+ insb (EPPADDR (port), buf, length);
+ if (inb (STATUS (port)) & 0x01) {
+ clear_epp_timeout (port);
+ return -EIO;
+ }
+ return length;
+ }
for (; got < length; got++) {
*((char*)buf)++ = inb (EPPADDR (port));
if (inb (STATUS (port)) & 0x01) {
@@ -413,6 +488,15 @@
int flags)
{
size_t written = 0;
+
+ if ((flags & PARPORT_EPP_FAST) && (length > 1)) {
+ outsb (EPPADDR (port), buf, length);
+ if (inb (STATUS (port)) & 0x01) {
+ clear_epp_timeout (port);
+ return -EIO;
+ }
+ return length;
+ }
for (; written < length; written++) {
outb (*((char*)buf)++, EPPADDR (port));
if (inb (STATUS (port)) & 0x01) {
@@ -500,7 +584,8 @@
/* We don't want to be interrupted every character. */
parport_pc_disable_irq (port);
- frob_econtrol (port, (1<<4), (1<<4)); /* nErrIntrEn */
+ /* set nErrIntrEn and serviceIntr */
+ frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2));
/* Forward mode. */
parport_pc_data_forward (port); /* Must be in PS2 mode */
@@ -575,6 +660,7 @@
left--;
}
+dump_parport_state ("leave fifo_write_block_dma", port);
return length - left;
}
@@ -590,6 +676,7 @@
unsigned long start = (unsigned long) buf;
unsigned long end = (unsigned long) buf + length - 1;
+dump_parport_state ("enter fifo_write_block_dma", port);
if (end < MAX_DMA_ADDRESS) {
/* If it would cross a 64k boundary, cap it at the end. */
if ((start ^ end) & ~0xffffUL)
@@ -608,7 +695,8 @@
/* We don't want to be interrupted every character. */
parport_pc_disable_irq (port);
- frob_econtrol (port, (1<<4), (1<<4)); /* nErrIntrEn */
+ /* set nErrIntrEn and serviceIntr */
+ frob_econtrol (port, (1<<4) | (1<<2), (1<<4) | (1<<2));
/* Forward mode. */
parport_pc_data_forward (port); /* Must be in PS2 mode */
@@ -698,6 +786,7 @@
if (dma_handle)
pci_unmap_single(priv->dev, dma_handle, length, PCI_DMA_TODEVICE);
+dump_parport_state ("leave fifo_write_block_dma", port);
return length - left;
}
@@ -740,10 +829,10 @@
/* Adjust for the contents of the FIFO. */
for (written -= priv->fifo_depth; ; written++) {
- if (inb (ECONTROL (port)) & 0x2)
+ if (inb (ECONTROL (port)) & 0x2) {
/* Full up. */
break;
-
+ }
outb (0, FIFO (port));
}
@@ -791,9 +880,10 @@
r = parport_wait_peripheral (port,
PARPORT_STATUS_PAPEROUT,
PARPORT_STATUS_PAPEROUT);
- if (r)
+ if (r) {
printk (KERN_DEBUG "%s: PError timeout (%d) "
"in ecp_write_block_pio\n", port->name, r);
+ }
}
/* Set up ECP parallel port mode.*/
@@ -824,10 +914,10 @@
/* Adjust for the contents of the FIFO. */
for (written -= priv->fifo_depth; ; written++) {
- if (inb (ECONTROL (port)) & 0x2)
+ if (inb (ECONTROL (port)) & 0x2) {
/* Full up. */
break;
-
+ }
outb (0, FIFO (port));
}
@@ -879,58 +969,99 @@
char *bufp = buf;
port = port->physport;
+DPRINTK (KERN_DEBUG "parport_pc: parport_pc_ecp_read_block_pio\n");
+dump_parport_state ("enter fcn", port);
/* Special case: a timeout of zero means we cannot call schedule(). */
if (!port->cad->timeout)
return parport_ieee1284_ecp_read_data (port, buf,
length, flags);
- fifofull = fifo_depth;
- if (port->ieee1284.mode == IEEE1284_MODE_ECPRLE)
+ if (port->ieee1284.mode == IEEE1284_MODE_ECPRLE) {
/* If the peripheral is allowed to send RLE compressed
* data, it is possible for a byte to expand to 128
* bytes in the FIFO. */
fifofull = 128;
+ } else {
+ fifofull = fifo_depth;
+ }
/* If the caller wants less than a full FIFO's worth of data,
- * go through software emulation. Otherwise we may have to through
+ * go through software emulation. Otherwise we may have to throw
* away data. */
if (length < fifofull)
return parport_ieee1284_ecp_read_data (port, buf,
length, flags);
- /* Switch to reverse mode if necessary. */
- if ((port->ieee1284.phase != IEEE1284_PH_REV_IDLE) &&
- (port->ieee1284.phase != IEEE1284_PH_REV_DATA)) {
- /* Event 38: Set nAutoFd low */
+ if (port->ieee1284.phase != IEEE1284_PH_REV_IDLE) {
+ /* change to reverse-idle phase (must be in forward-idle) */
+
+ /* Event 38: Set nAutoFd low (also make sure nStrobe is high) */
parport_frob_control (port,
- PARPORT_CONTROL_AUTOFD,
+ PARPORT_CONTROL_AUTOFD
+ | PARPORT_CONTROL_STROBE,
PARPORT_CONTROL_AUTOFD);
parport_pc_data_reverse (port); /* Must be in PS2 mode */
udelay (5);
-
/* Event 39: Set nInit low to initiate bus reversal */
parport_frob_control (port,
PARPORT_CONTROL_INIT,
0);
-
- /* Event 40: PError goes low */
+ /* Event 40: Wait for nAckReverse (PError) to go low */
r = parport_wait_peripheral (port, PARPORT_STATUS_PAPEROUT, 0);
- if (r)
+ if (r) {
printk (KERN_DEBUG "%s: PE timeout Event 40 (%d) "
"in ecp_read_block_pio\n", port->name, r);
+ return 0;
+ }
}
/* Set up ECP FIFO mode.*/
- parport_pc_data_reverse (port); /* Must be in PS2 mode */
- parport_pc_frob_control (port,
+/* parport_pc_frob_control (port,
PARPORT_CONTROL_STROBE |
PARPORT_CONTROL_AUTOFD,
- 0);
+ PARPORT_CONTROL_AUTOFD); */
r = change_mode (port, ECR_ECP); /* ECP FIFO */
if (r) printk (KERN_DEBUG "%s: Warning change_mode ECR_ECP failed\n", port->name);
+
port->ieee1284.phase = IEEE1284_PH_REV_DATA;
+ /* the first byte must be collected manually */
+dump_parport_state ("pre 43", port);
+ /* Event 43: Wait for nAck to go low */
+ r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, 0);
+ if (r) {
+ /* timed out while reading -- no data */
+ printk (KERN_DEBUG "PIO read timed out (initial byte)\n");
+ goto out_no_data;
+ }
+ /* read byte */
+ *bufp++ = inb (DATA (port));
+ left--;
+dump_parport_state ("43-44", port);
+ /* Event 44: nAutoFd (HostAck) goes high to acknowledge */
+ parport_pc_frob_control (port,
+ PARPORT_CONTROL_AUTOFD,
+ 0);
+dump_parport_state ("pre 45", port);
+ /* Event 45: Wait for nAck to go high */
+/* r = parport_wait_peripheral (port, PARPORT_STATUS_ACK, PARPORT_STATUS_ACK); */
+dump_parport_state ("post 45", port);
+r = 0;
+ if (r) {
+ /* timed out while waiting for peripheral to respond to ack */
+ printk (KERN_DEBUG "ECP PIO read timed out (waiting for nAck)\n");
+
+ /* keep hold of the byte we've got already */
+ goto out_no_data;
+ }
+ /* Event 46: nAutoFd (HostAck) goes low to accept more data */
+ parport_pc_frob_control (port,
+ PARPORT_CONTROL_AUTOFD,
+ PARPORT_CONTROL_AUTOFD);
+
+
+dump_parport_state ("rev idle", port);
/* Do the transfer. */
while (left > fifofull) {
int ret;
@@ -949,31 +1080,35 @@
if (ecrval & 0x01) {
/* FIFO is empty. Wait for interrupt. */
+dump_parport_state ("FIFO empty", port);
/* Anyone else waiting for the port? */
if (port->waithead) {
- printk (KERN_DEBUG
- "Somebody wants the port\n");
+ printk (KERN_DEBUG "Somebody wants the port\n");
break;
}
/* Clear serviceIntr */
outb (ecrval & ~(1<<2), ECONTROL (port));
false_alarm:
+dump_parport_state ("waiting", port);
ret = parport_wait_event (port, HZ);
- if (ret < 0) break;
+DPRINTK (KERN_DEBUG "parport_wait_event returned %d\n", ret);
+ if (ret < 0)
+ break;
ret = 0;
if (!time_before (jiffies, expire)) {
/* Timed out. */
+dump_parport_state ("timeout", port);
printk (KERN_DEBUG "PIO read timed out\n");
break;
}
ecrval = inb (ECONTROL (port));
if (!(ecrval & (1<<2))) {
if (current->need_resched &&
- time_before (jiffies, expire))
+ time_before (jiffies, expire)) {
schedule ();
-
+ }
goto false_alarm;
}
@@ -986,12 +1121,15 @@
if (ecrval & 0x02) {
/* FIFO is full. */
+dump_parport_state ("FIFO full", port);
insb (fifo, bufp, fifo_depth);
bufp += fifo_depth;
left -= fifo_depth;
continue;
}
+DPRINTK (KERN_DEBUG "*** ecp_read_block_pio: reading one byte from the FIFO\n");
+
/* FIFO not filled. We will cycle this loop for a while
* and either the peripheral will fill it faster,
* tripping a fast empty with insb, or we empty it. */
@@ -999,17 +1137,29 @@
left--;
}
+ /* scoop up anything left in the FIFO */
+ while (left && !(inb (ECONTROL (port) & 0x01))) {
+ *bufp++ = inb (fifo);
+ left--;
+ }
+
port->ieee1284.phase = IEEE1284_PH_REV_IDLE;
+dump_parport_state ("rev idle2", port);
+
+out_no_data:
+
+ /* Go to forward idle mode to shut the peripheral up (event 47). */
+ parport_frob_control (port, PARPORT_CONTROL_INIT, PARPORT_CONTROL_INIT);
- /* Go to forward idle mode to shut the peripheral up. */
- parport_frob_control (port, PARPORT_CONTROL_INIT, 0);
+ /* event 49: PError goes high */
r = parport_wait_peripheral (port,
PARPORT_STATUS_PAPEROUT,
PARPORT_STATUS_PAPEROUT);
- if (r)
+ if (r) {
printk (KERN_DEBUG
"%s: PE timeout FWDIDLE (%d) in ecp_read_block_pio\n",
port->name, r);
+ }
port->ieee1284.phase = IEEE1284_PH_FWD_IDLE;
@@ -1022,13 +1172,21 @@
port->name, lost);
}
+dump_parport_state ("fwd idle", port);
return length - left;
}
#endif /* IEEE 1284 support */
-
#endif /* Allowed to use FIFO/DMA */
+
+/*
+ * ******************************************
+ * INITIALISATION AND MODULE STUFF BELOW HERE
+ * ******************************************
+ */
+
+
void parport_pc_inc_use_count(void)
{
#ifdef MODULE
@@ -1107,20 +1265,20 @@
cr27=inb(io+1);
outb(0xaa,io);
- printk ("SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, "
+ printk (KERN_INFO "SMSC 37c669 LPT Config: cr_1=0x%02x, 4=0x%02x, "
"A=0x%2x, 23=0x%02x, 26=0x%02x, 27=0x%02x\n",
cr1,cr4,cra,cr23,cr26,cr27);
/* The documentation calls DMA and IRQ-Lines by letters, so
the board maker can/will wire them
appropriately/randomly... G=reserved H=IDE-irq, */
- printk ("SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, "
+ printk (KERN_INFO "SMSC LPT Config: io=0x%04x, irq=%c, dma=%c, "
"fifo threshold=%d\n", cr23*4,
(cr27 &0x0f) ? 'A'-1+(cr27 &0x0f): '-',
(cr26 &0x0f) ? 'A'-1+(cr26 &0x0f): '-', cra & 0x0f);
- printk("SMSC LPT Config: enabled=%s power=%s\n",
+ printk(KERN_INFO "SMSC LPT Config: enabled=%s power=%s\n",
(cr23*4 >=0x100) ?"yes":"no", (cr1 & 4) ? "yes" : "no");
- printk("SMSC LPT Config: Port mode=%s, EPP version =%s\n",
+ printk(KERN_INFO "SMSC LPT Config: Port mode=%s, EPP version =%s\n",
(cr1 & 0x08 ) ? "Standard mode only (SPP)" : modes[cr4 & 0x03],
(cr4 & 0x40) ? "1.7" : "1.9");
@@ -1132,7 +1290,7 @@
while((superios[i].io!= 0) && (i<NR_SUPERIOS))
i++;
if(i==NR_SUPERIOS)
- printk("Super-IO: too many chips!\n");
+ printk(KERN_INFO "Super-IO: too many chips!\n");
else {
int d;
switch (cr23*4) {
@@ -1192,23 +1350,23 @@
crf0=inb(io+1);
outb(0xaa,io);
- printk("Winbond LPT Config: cr_30=%02x 60,61=%02x%02x "
+ printk(KERN_INFO "Winbond LPT Config: cr_30=%02x 60,61=%02x%02x "
"70=%02x 74=%02x, f0=%02x\n", cr30,cr60,cr61,cr70,cr74,crf0);
- printk("Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ",
+ printk(KERN_INFO "Winbond LPT Config: active=%s, io=0x%02x%02x irq=%d, ",
(cr30 & 0x01) ? "yes":"no", cr60,cr61,cr70&0x0f );
if ((cr74 & 0x07) > 3)
printk("dma=none\n");
else
printk("dma=%d\n",cr74 & 0x07);
- printk("Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n",
+ printk(KERN_INFO "Winbond LPT Config: irqtype=%s, ECP fifo threshold=%d\n",
irqtypes[crf0>>7], (crf0>>3)&0x0f);
- printk("Winbond LPT Config: Port mode=%s\n", modes[crf0 & 0x07]);
+ printk(KERN_INFO "Winbond LPT Config: Port mode=%s\n", modes[crf0 & 0x07]);
if(cr30 & 0x01) { /* the settings can be interrogated later ... */
while((superios[i].io!= 0) && (i<NR_SUPERIOS))
i++;
if(i==NR_SUPERIOS)
- printk("Super-IO: too many chips!\n");
+ printk(KERN_INFO "Super-IO: too many chips!\n");
else {
superios[i].io = (cr60<<8)|cr61;
superios[i].irq = cr70&0x0f;
@@ -1228,7 +1386,7 @@
non-winbond register */
return;
- printk("Winbond chip at EFER=0x%x key=0x%02x devid=%02x devrev=%02x "
+ printk(KERN_INFO "Winbond chip at EFER=0x%x key=0x%02x devid=%02x devrev=%02x "
"oldid=%02x\n", efer,key,devid,devrev,oldid);
id=(devid<<8) | devrev;
@@ -1248,9 +1406,9 @@
else progif=0;
if(type==NULL)
- printk("Winbond unknown chip type\n");
+ printk(KERN_INFO "Winbond unknown chip type\n");
else
- printk("Winbond chip type %s\n",type);
+ printk(KERN_INFO "Winbond chip type %s\n",type);
if(progif==2)
show_parconfig_winbond(efer,key);
@@ -1269,7 +1427,7 @@
return;
func=NULL;
- printk("SMSC chip at EFER=0x%x key=0x%02x devid=%02x devrev=%02x\n",
+ printk(KERN_INFO "SMSC chip at EFER=0x%x key=0x%02x devid=%02x devrev=%02x\n",
efer,key,devid,devrev);
id=(devid<<8) | devrev;
@@ -1279,9 +1437,9 @@
else if (devid==0x66) type="37c666GT";
if(type==NULL)
- printk("SMSC unknown chip type\n");
+ printk(KERN_INFO "SMSC unknown chip type\n");
else
- printk("SMSC chip type %s\n",type);
+ printk(KERN_INFO "SMSC chip type %s\n",type);
if(func) (func)(efer,key);
return;
@@ -1382,7 +1540,7 @@
static void __devinit detect_and_report_winbond (void)
{
- printk("Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n");
+ printk(KERN_DEBUG "Winbond Super-IO detection, now testing ports 3F0,370,250,4E,2E ...\n");
winbond_check(0x3f0,0x87);
winbond_check(0x370,0x87);
@@ -1395,7 +1553,7 @@
static void __devinit detect_and_report_smsc (void)
{
- printk("SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n");
+ printk(KERN_DEBUG "SMSC Super-IO detection, now testing Ports 2F0, 370 ...\n");
smsc_check(0x3f0,0x55);
smsc_check(0x370,0x55);
smsc_check(0x3f0,0x44);
@@ -1705,7 +1863,7 @@
printk("%d",intrline[(configb >>3) & 0x07]);
else
printk("<none or set by other means>");
- printk ( " dma=");
+ printk (" dma=");
if( (configb & 0x03 ) == 0x00)
printk("<none or set by other means>\n");
else
@@ -1756,17 +1914,19 @@
*/
/* If EPP timeout bit clear then EPP available */
- if (!clear_epp_timeout(pb))
+ if (!clear_epp_timeout(pb)) {
return 0; /* No way to clear timeout */
+ }
/* Check for Intel bug. */
if (priv->ecr) {
unsigned char i;
for (i = 0x00; i < 0x80; i += 0x20) {
outb (i, ECONTROL (pb));
- if (clear_epp_timeout (pb))
+ if (clear_epp_timeout (pb)) {
/* Phony EPP in ECP. */
return 0;
+ }
}
}
@@ -1787,8 +1947,9 @@
int result;
unsigned char oecr;
- if (!priv->ecr)
+ if (!priv->ecr) {
return 0;
+ }
oecr = inb (ECONTROL (pb));
/* Search for SMC style EPP+ECP mode */
@@ -1930,10 +2091,11 @@
pb->irq = programmable_irq_support(pb);
}
- if (pb->modes & PARPORT_MODE_ECP)
+ if (pb->modes & PARPORT_MODE_ECP) {
pb->irq = irq_probe_ECP(pb);
+ }
- if (pb->irq == PARPORT_IRQ_NONE && priv->ecr &&
+ if ((pb->irq == PARPORT_IRQ_NONE) && priv->ecr &&
(pb->modes & PARPORT_MODE_EPP))
pb->irq = irq_probe_EPP(pb);
@@ -1978,11 +2140,12 @@
const struct parport_pc_private *priv = p->private_data;
if (priv->ecr)
p->dma = programmable_dma_support(p); /* ask ECP chipset first */
- if (p->dma == PARPORT_DMA_NONE)
+ if (p->dma == PARPORT_DMA_NONE) {
/* ask known Super-IO chips proper, although these
claim ECP compatible, some don't report their DMA
conforming to ECP standards */
p->dma = get_superio_dma(p);
+ }
return p->dma;
}
@@ -2092,6 +2255,8 @@
p->ops->compat_write_data = parport_pc_compat_write_block_pio;
#ifdef CONFIG_PARPORT_1284
p->ops->ecp_write_data = parport_pc_ecp_write_block_pio;
+ /* currently broken, but working on it.. (FB) */
+ /* p->ops->ecp_read_data = parport_pc_ecp_read_block_pio; */
#endif /* IEEE 1284 support */
if (p->dma != PARPORT_DMA_NONE) {
printk(", dma %d", p->dma);
@@ -2576,7 +2741,7 @@
}
#else
static struct pci_driver parport_pc_pci_driver;
-static int __init parport_pc_init_superio(void) {return 0;}
+static int __init parport_pc_init_superio(int autoirq, int autodma) {return 0;}
#endif /* CONFIG_PCI */
/* This is called by parport_pc_find_nonpci_ports (in asm/parport.h) */
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)