From owner-pc532%daver@mips.com Thu Feb  1 00:10:32 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Wed, 31 Jan 90 22:30:51 +0100
From: P{r Emanuelsson <pell@isy.liu.se>
To: pc532@daver
Subject: Re: SCSI floppy interface

>Wow...
>
>NSWEEP was the single most useful utility on my old CP/M-80 v.2.2 box
>around 83/84 (MASM-80 and Turbo Pascal v.1.0 was how I learned to programme).

And I don't even know what the d*mned thing is!! :-) Can anyone tell me?
Or send it to me - my home computer is a Heath Z89, CP/M 2.0 (it's true)!

     /Pell
--
Dept. of Electrical Engineering	                         pell@isy.liu.se
University of Linkoping, Sweden	                    ...!uunet!isy.liu.se!pell

From owner-pc532%daver@mips.com Thu Feb  1 00:12:29 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Tue, 30 Jan 90 17:34:59 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: SCSI overview

This month's Byte (February 1990) contains the first installment of a two
part article on SCSI. I've read it, and it was very helpful. Of course,
I'm sure that the rest of you know all about SCSI and don't need this
article. :-)

-- Jerry Callen
   jcallen@encore.com
   (508) 460-0500 (w)
   (617) 876-5330 (h)

From owner-pc532%daver@mips.com Thu Feb  1 02:18:25 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
To: pc532@daver.UU.NET
From: Dave Mason <mason%tmsoft%uunet@daver>
Subject: Re: HD64180 for floppy 
Organization: TM Software Associates Inc.
Date: 31 Jan 90 16:02:54 EST (Wed)

> > This was my first reaction to the 64180, too. But consider our application.
> 
> Ok, I'm sold.
> 
> > I realize I'm a bit of a dinosaur, but I was planning to do all the code
> > in assembler.
> 
> !!  Ok, I still write a lot of assembler too, but less and less by choice...  

I have a version of Ron Cain's smallc that produces code for Z80/i8080
(and PDP11) with a peep-hole optimizer.  The end result is pretty good
code.  The nice thing about the optimizer is that if you notice some
pattern in the output that looks particularly bad, you (or at least
*I*) can easily add more patterns to the optimizer.  This is based on
Cain's version, not Hendrix's so it is P.D.  Personally smallc is as
close to assembler as I want to be (if I have a choice).  Though
hacking in assembler is fun, I'd rather stick to low-level things like
context switching.

	../Dave

From owner-pc532%daver@mips.com Thu Feb  1 10:14:16 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
X-Mailer: Mail User's Shell (6.4 2/14/89)
To: pc532@daver.uu.net
Subject: Media and monitors
Date: 1 Feb 90 13:50:06 GMT (Thu)
From: ken%mm%gatech@ames.arc.nasa.gov (Ken Seefried iii)

I'd prefer to have a distribution media that I don't need another
board to use.  While I think the floppy controller board is a cool
idea, I doubt I'll build one, as I have other things I'd like to
stick in those few precious slots.  To that end:

A company called Insite has a 3.5", SCSI-based `super-floppy'
drive they call a `floptical'.  The media has imbedded optical
tracks to allow very precise placement of the head.  End result is
an ability to stuff 20MB on one disk (looks like a 3.5" disk).
The new model can even read and write 720K and 1.44MB disks.
The drive itself is pretty cheap, as I remember (<$300) and the
optical media isn't to bad either.

It's cheap enough most anyone could by one, they've been around
for about two years, and they're shipping...

On the subject of FORTH based monitors, it might be interesting
to note that the Sun SPARCstation 1 (and, presumedly, all
follow-ons) have a FORTH interpreter in ROM that handles all
device bootstrap functions.  Very slick...

-- 
       Ken Seefried iii             ...!<anywhere>!uunet!gatech!mm!ken
         MetaMedia, Inc.              ken%mm.uucp@gatech.edu 
           Atlanta, Georgia, USA        obquote: "I feel...like a god..."
    
                         "Release the weasels..."

From owner-pc532%daver@mips.com Thu Feb  1 15:15:44 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Thu, 1 Feb 90 12:03:42 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver
Subject: more power

[In the message entitled "Floppys and other boards" on Feb  1,  1:27, daver!uunet!eyrie!munnari!labtam.oz.au!athos writes:]
> Another board:
> --------------
> A while ago I asked this question, but didn't notice any response.  For a
> multi-processor scenario similar to that mentioned above, not every board
> needs a synchronous SCSI for disk and tape, nor serial ports.  Given this
> outline, and using the pc532 circuit as a starting point, can anyone tell
> me if this could be cleanly designed onto an expansion card?
> 
> 	25 MHz 32532 & 32381
> 	One bank of SIMMs (ie. 4 or 16 Mb RAM)
> 	DP8490 for connection to the motherboard, and maybe another for
> 		possible connection to a SCSI backplane for further I/O
> 		cards.  Leave that as a 50-pin IDC.
> ___________________________________________________________________________
> David Burren (Athos),			ACSnet: athos%eyrie@labtam.oz.au

Hi,
	this should be pretty easy to do. The et532 is basically the same
core circuit as on the pc532 except the 32381 etal. has been removed along
with 20 MHz operation. It would be just a couple of days (or less) work
to grab the core from the pc532 and do a standalone board. Considering
that the et532 has 2 octarts and thick/thin ethernet + associated connectors,
removing all that stuff and putting a 32381 + more ram would be very easy
space wise. The et532 is a 6 layer board, so the cp532 would definitely be
route-able. The only thing to do is make sure you use the sideways SIMM
sockets, since the megabit simms are too high to stand upright without
crowding an adjacent board. Sideways sockets take nearly twice the space,
but there should be quite a lot of that available.

Regarding progress on the prototype pc532 Rev 1D: things are progressing,
albeit slowly since Dave and I are mainly working on another design that
has a higher priority (ie money), but we did get the SCSI transfer speed
up last night. We can now drive the SCSI chips at up to 4.5 megabytes/sec.
This is the speed that the 32532 can drive the chips, obviously the actual
limit depends on the SCSI device on the end of the cable. To do this we
use unrolled 'MOVD' instructions, this enables interruptibility during the
transfer without introducing problems due to I/O read/write orders and
destructive reading side effects (32532'isms due to data caches and write
buffers). Anyhow, to get speed out of the pc532 we are doing some tricky
stuff, which of course will definitely be posted.

We have noticed an interesting problem in the way the 32532 handles the
instruction cache when /IODEC is asserted on the previous data access.
For whatever reason (broken pipeline etc?) the 32532 will not cache the
instruction. We noticed this because we had an unrolled loop using MOVD
instructions (dynamic bus sized from the 8 bit SCSI data to 32 bit DRAM)
and even though we had the instruction cache on, the 32532 would go out
to DRAM to get some of the instructions (strangely only a burst of 2 words)
after every SCSI access. Dave even attempted to lock the instruction cache
after the first loop to no avail. Anyhow, as soon as I changed the DEC32
pal to not /IOINH on the SCSI and to not assert /IODEC back to the 32532,
the same code worked correctly, i.e. the instructions got cached and of
course the loop performance doubled. Very strange behaviour and of course
not documented in any way in the data book... The code to handle the SCSI
data without asserting /IODEC and ignoring /IOINH is fairly subtle, we will
post the required order to write code to make it all work.

regards,


-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Thu Feb  1 15:29:46 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Subject: SCSI floppy form factor (was Media and monitors)
To: pc532%tarpit@daver.uu.NET
Date: Thu, 1 Feb 90 14:41:23 EST
From: John L. Connin <johnc%manatee%uunet@daver>
X-Mailer: Elm [version 2.1 PL1]

[ in Media and monitors, Ken Seefried iii writes ]

I'd prefer to have a distribution media that I don't need another
board to use.  While I think the floppy controller board is a cool
idea, I doubt I'll build one, as I have other things I'd like to
stick in those few precious slots.  To that end:

[stuff deleted]

I do not know what Jerry has in mind for the physical shape of the
SCSI-floppy board.  However, one alternative is a rectangular board
somewhat smaller than a 5 1/4 drive which has mounting holes that
correspond to a 3 1/2 inch drive.  This arrangement would permit
the board to be mounted in a standard 5 1/4 inch to 3 1/2 inch
frame adapter and thus any half-height drive bay.  (see JDR page 26, 
"5 1/4 fram for 3 1/2 inch drive", $9.95).

Does anyone know the address and/or telephone number of a company named
"Syntax" ??  They make prototype PCB's and PCB's which adapt various
plcc chips to 0.10 inch grid.

regards,
johnc


From owner-pc532%daver@mips.com Thu Feb  1 17:39:57 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Subject: Re: Media and monitors
To: pc532%tarpit@daver.uu.NET
Date: Thu, 1 Feb 90 14:58:04 EST
From: John L. Connin <johnc%manatee%uunet@daver>
X-Mailer: Elm [version 2.1 PL1]


[ in Media and monitors, Ken Seefried iii writes ]
[stuff deleted ]

> On the subject of FORTH based monitors, it might be interesting
> to note that the Sun SPARCstation 1 (and, presumedly, all
> follow-ons) have a FORTH interpreter in ROM that handles all
> device bootstrap functions.  Very slick...

Mitch Bradley is the author (see attachment).  Perhaps he could persuaded
to contribute.  If anyone knows Mitch, I for one would be appreciative
if you would check out this possibility.

Best regards,
johnc

	------------------------------------------------------

From: wmb@SUN.COM (Mitch Bradley)
Newsgroups: comp.lang.forth
Subject: Re:  The *ultimate* Forth hardware engine?
Message-ID: <8910110212.AA28632@jade.berkeley.edu>
Date: 10 Oct 89 17:30:41 GMT
Sender: daemon@ucbvax.BERKELEY.EDU
Reply-To: Forth Interest Group International List <FIGI-L%SCFVM.bitnet@jade.berkeley.edu>
Organization: The Internet
Lines: 185

> I was pleasantly shock the other day while reading through the
> _The_SBus_Specification_ manual for the SPARCstation 1.
> On page 87, the begin to describe the device driver interface to the
> SBus. Instead of a machine language interface, they use something
> called the "FCode Language." To quote the first paragraph of section 3.4.4:
>
>        "The FCode programming language is closely related to the
>         Forth 83 programming language. FCode is essentially Forth
>         83 with extensions appropriate to its use for device
>         identification and boot drivers. Additionally, FCode has a
>         well-specified binary format, where Forth 83 specifies only
>         the source format.

Now that the SBus spec is public, I guess I can talk about this topic.

I am the architect and implementor of FCode, and the author of the quoted
text from the SBus spec.

The SPARCstation 1 is the most popular machine in Sun's current product
line.  It offers 11 MIPS performance for $9000.  It is expandable via
a new open bus called "SBus"

The boot PROM on the Sun SPARCstation 1 is written in Forth.
When you power-on the machine, if you don't touch it, it
will perform some selftests and then automatically boot Unix.
If you abort the selftests or the Unix load sequence, then you will
get a monitor prompt which looks like ">".  At this prompt, you have
exactly 3 options:  "b" for boot, "c" for continue (as if the abort
had not happened, and "n" for "new command mode".

"n" is the one you want.  That switches the prompt to "ok " and you're
in Forth.  It's a real Forth, with all the usual stuff plus a lot of
extensions:
 pretty-printing decompiler
 disassembler
 symbolic debugger for C programs (e.g the Unix kernel)
 configuration manager
 FCode interpreter
 boot protocols
 "canned" hardware diagnostics

All of these extensions are just Forth words, so you can use them
inside colon definitions.  For instance, the symbolic debugger
is a set of stack-oriented words to set breakpoints, display
various registers, single-step, etc (as opposed to some Forth debuggers
I have seen, where you have to get into a special "debug mode"
and the rest of the Forth interpreter is temporarily unavailable).

  Configuration Manager

The configuration manager is a halfway object-oriented package for
dealing with machine configuration data stored in non-volatile RAM.
Each configuration option is a multiple-code-field word which
implements operations for storing and fetching the item's value into the
NVRAM chip, and encoding and decoding that value to and from human-readable
form.  Each item has both a current value and a default value, and
the boot PROM can automatically re-establish a complete default state
in the event of a failure which trashes the NVRAM contents.  The user
can get a symbolic listing of any or all of the configuration options,
and can alter any option at will, using the symbolic name and a
human-understandable representation of the value.

For example, one of the options is named "input-device".  Its value
is either "ttya", "ttyb", or "keyboard".  Internally, the value is stored
in the NVRAM as a single byte containing either 0, 1, or 2.  The user
doesn't know or care about the encoding, though.  The "printenv" command,
which shows all the options at once, would display this options as:

Parameter Name        Value                          Default Value

...
input-device          ttya                           keyboard
...


To change the value, the casual user would type:

 setenv input-device keyboard

There are many other option data types, for example text strings, binary
data arrays, true/false flags, and numbers.  The casual user doesn't
worry about the representation of the data type.

The configuration options are real Forth words too.  If you type just
"input-device", or compile it into a colon definition, the value is left
on the stack where you can use it for whatever purpose.


   FCode Interpreter

The SPARCstation 1 has an expansion bus called "SBus".  It is Sun's
intention to promote SBus as a standard for use both on Sun and non-Sun
machines.  SBus was designed for low-cost and high performance.  SBus
cards are cheaper to build than other 32-bit buses, yet the data transfer
rate is faster than VMEbus, MicroChannel, or NuBus.  The SBus spec has
been released to the public, and SBus interface chips are already available
>From one outside vendor.

One of the problems with open buses is booting.  Traditionally, there were
3 options for booting from a third-party device:

a) The card emulates some device already supported by the computer
   manufacturer.

b) The third-party device comes with special ROMs for the supported
   computer.

c) The computer supports plug-in boot devices, with external boot ROMs.
   The external boot ROMs are encoded in the machine language for the
   particular computer.

Approach (c) works reasonably well for PC add-in, where you know that
the processor is going to be 8086 compatible, and for Mac II NuBus
cards, because NuBus is used on few machines other than Mac IIs.

However, we did not wish to restrict the use of SBus to SPARC processors.
Sun itself supports 3 processor families (SPARC, 680x0, 80x86), and we
would like to see SBus used on other machines as well.  Consequently,
we chose to encode our boot drivers in a machine-independent language,
Forth was the obvious (to me at least) choice.  (Texas Instruments
originally specified a machine-independent stack-oriented language
for NuBus, but Apple chose not to use it).

SBus drivers are encoded in FCode, which is related to Forth in the
following way.  Take the Forth 83 standard words, throw out a few which
are obviously not useful in the booting environment, and add some necessary
ones, such as portable addressing words and application hooks (memory
allocation, boot application interfaces).  This gives you a finite
set of words which forms a functionally complete programming language.
There are about 200 primitive words in this set, and something like
150 system "library" words.  Assign a unique integer to each of these
words.

Now, to write an FCode program, you just write a Forth program.  Then you
pass the Forth source code through a "tokenizer" program which replaces
each word name with the associated binary integer.  The resulting array
of integers is an FCode program.  It is semantically equivalent to the
Forth source code, but it takes up less space and can be interpreted/compiled
more quickly, because indexing into a table is faster than a dictionary
search.

That is FCode.  It is used for SBus drivers, both for boot devices such
as disk controllers and network interfaces, and also for display devices
such as frame buffers and graphics boards.  These FCode drivers are
primarily used during the boot process.  Once Unix is up and running,
Unix uses its own drivers.  The Unix drivers are much more complicated,
and usually higher performance, since they often go to great lengths
to optimize sequences of requests, overlap operations, etc.

Devices which are not needed during the boot process (e.g. printer interface)
have FCode PROMs too.  In this case, the FCode PROM serves to identify
the device and to report some of its characteristics to Unix.  To this
end, FCode has commands for exporting name/value pairs to Unix, along
with a machine-independent representation for structured data.


  Forth/FCode on Other Sun Machines

The Forth PROMs (the official name is "Open Boot PROM") are being
designed-in to some future Sun machines, so you can expect to see more
of them as time goes by.


  Documentation

The SPARCstation 1 Forth is a built-in on-line help facility.  There
is also a manual called the "Open PROM Toolkit User's Guide" which
is slated for inclusion in the SBus Developer's Kit, which is due out
soon.  I can't say exactly when.


  Buy a SPARCstation for the Forth PROM?

That's probably not what you want to do.  The Forth in the SPARCstation 1
boot PROM, while complete, is optimized for the booting / machine testing /
Unix debugging.  It trades off execution speed to be more compact, and
its primary users are not expected to be Forth programmers.

If you are developing SBus hardware, then you would want a SPARCstation 1
so you could use the system, including the PROM Forth, for debugging your
product.

If you just want to use Forth, the best way to do it on a SPARCstation 1
is to run Forth under Unix.  My Sun Forth product is a suitable choice for
that environment.


From owner-pc532%daver@mips.com Thu Feb  1 17:40:51 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
To: pc532@daver.UU.NET
Subject: Re: Systems integration standards, anybody?
Date: 1 Feb 90 10:35:03 CST (Thu)
From: john@starfire.MN.ORG

[In an article dated Wed, 31 Jan 90 13:58:47 -0800, J.R. (Use the Source, Luke) Stoner <asgard@omni.com> writes:]

>The density of floppy media and format *must* be decided before bending
>metal for
>a floppy controller, since 5.25" LD, 5.25" AT, 3.5" LD, and 3.5" HD all have
>*different* clocking rates for the controller chip, which was a pain when
>the controller was essentially an 8272.  Capability to format and copy ...

I don't understand.  I have great respect for Mr. Stoner's experience and
advice, but this is simply not true.  Except for zone-sectored floppies
(Commodore, Apple, etc.) there are exactly 2 clock rates for all floppies,
250KHz, and 500KHz.  I know, because my system is currently running 8"DSDD,
5.25"DSDD, 5.25"DSQD, 3.5"DSDD, and 3.5"DSHD, and I wrote the driver tables
which set the controller parameters.  The tricky one is the 5.25"DSQD, which
rotates at 360RPM rather than 300RPM like all other small floppies (in general,
8" are 360RPM, smaller ones are 300RPM).  If it were not for the speed
difference, 5.25"DSQD and 3.5"DSHD would be identical from the controller's
viewpoint, just like the 3.5"DSDD and short-lived 720/800K 5.25" floppies
are.  I suppose you could ignore the dual-speed mode of the floppy motor and
use a 416666.7KHz clocking rate, but that would be very bizarre.

Actually, this is one of the things that I really like about floppies:
by juggling a small handful of parameters (and building a cable adaptor)
you can talk to a whole assortment of (non-zone encoded!) floppies with
the same controller!

--
		   John Lind, Starfire Consulting Services
E-mail: john@starfire.MN.ORG		USnail: PO Box 13001, Mpls MN  55414

From owner-pc532%daver@mips.com Thu Feb  1 18:45:31 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Thu, 1 Feb 90 15:32:51 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver.UU.NET
Subject: Re:  more power

[In the message entitled "Re:  more power" on Feb  1, 15:02, Desmond Young writes:]
> 
> Hmm,
>   is there any chance of an error if an interrupt is taken? That is,
> if you are not asserting /IODEC, and you leave the unrolled loop?
> /IODEC stops out of order accesses. What if the interrupt handles
> the SCSI chip?
> Des.

No problem, the 32532 has certain instructions that ensure serialization.
i.e. they guarantee that the write buffers will be flushed. So all you need
to do is execute one of them during the interrupt service routine prior to
accessing any of the SCSI registers. Of course all the other devices do
the right thing by /IODEC and /IOINH since they aren't performance hogs like
the SCSI. The instruction we plan to use, the MOVD instruction guarantees
non-interruptibility, i.e. it will complete before an interrupt can get in.
The only other source of retry is an MMU abort, and all we have to do there
is to ensure that the memory we are transferring to/from is not virtual...
I originally wanted to use the MOVSD instruction and disable interrupts
during the SCSI transfer but Dave felt he didn't want to suffer the interrupt
latency of a SCSI transfer, hence the testing of the MOVD instruction and
the discovering of the /IODEC-ICACHE problem. I wonder if NSC knows about it?

regards,

-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Thu Feb  1 18:47:22 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
From: dlr@daver.UU.NET (Dave Rand)
Date: Thu, 1 Feb 90 15:39:51 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.UU.NET
Subject: Re:  more power

[In the message entitled "Re:  more power" on Feb  1, 15:02, Desmond Young writes:]
>   is there any chance of an error if an interrupt is taken? That is,
> if you are not asserting /IODEC, and you leave the unrolled loop?
> /IODEC stops out of order accesses. What if the interrupt handles
> the SCSI chip?

Yup. There be magic here.

We are trading the speed for flexability here. Besides, interrupts are
themselves serializing events. The problem, which we will have to check
on, is when an interrupt causes an instruction to be aborted, causing
a re-read of an address (deep pipeline, remember). This is why we don't
want to use the MOVSD instruction. We could use it, by disabling interrupts,
and locking pages in memory (which they will be anyway), and permitting
interrupts only after a serializing instruction (like the enable interrupt
instruction :-), every 512 bytes or so.

With separate move instructions, serialization should not be an issue, as
instructions should be atomic.

Of course, since the 532/GX was not really designed for embedded applications,
there may be other speed tradeoffs we will have to make to get >4 megabytes
per second on the disk device. I was surprised when the IC failed to cache
due to the IODEC... this is not documented behaviour.



-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr%daver@uunet.uu.net

From owner-pc532%daver@mips.com Thu Feb  1 20:55:53 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Thu, 1 Feb 90 17:09:34 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver
Subject: 74as258/74as158

Hi folks,
	some of us (including me) have had a bit of a hard time getting hold
of 74as258's for the pc532. On reviewing the timing of the 74AS158 the only
parameter that is slower (by 0.5ns) is the select to output. This path is
not critical to the pc532 DRAM controller design. The other features of the
74AS258 is tristate control (which I don't use) and higher output drive which
is not a problem with the pc532 since all the outputs have high current
drivers prior to the DRAM devices. Therefore, if you can't get the 74AS258,
the 74AS158 is pin compatible (as used on the pc532) and will work just fine.

regards,

-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Fri Feb  2 00:01:21 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Subject: Re: Adaptec SCSI / st506 interfaces...
To: pc532%tarpit@daver.uu.NET
Date: Thu, 1 Feb 90 21:45:42 EST
From: John L. Connin <johnc%manatee%uunet@daver>
X-Mailer: Elm [version 2.1 PL1]

[ Mike Daly writes ]

> Granted that this is a bit unrelated to the topic at hand, but
> does anyone know of a place with half way decent prices on the 
> Adaptec SCSI/ST506 boards?  I know that Calf. Micro (or some such place)
> advertises in BYTE for about $250 or so each, but I have heard tell that
> you can find them for much less (< $90 is the rumor).....
>
> Hints?

See the Computer Surplus Store ad in "Computer Shopper".  

Adaptec Controllers:

	4000  SCSI to ST506/412	      $89
	4000A SCSI to ST506          $139
	4070  SCSI to ST506/412 RLL  $119
	5500  SCSI to ST506/412      $125

regards,
johnc


From owner-pc532%daver@mips.com Fri Feb  2 01:39:43 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
To: pc532@daver.UU.NET
Subject: Re: Systems integration standards, anybody? 
Date: Thu, 01 Feb 90 01:07:23 EST
From: David Taylor <taylor@Think.COM>

<To: daver.uu.net!pc532@mips.UUCP
<Subject: Re: Systems integration standards, anybody?
<Date: Wed, 31 Jan 90 13:58:47 -0800
<From: J.R. (Use the Source, Luke) Stoner <mips!omni.com!asgard@ames.UUCP>

<>> Ought the firmware contain, as a standard, something like kadb?
<
<>Looked at Bruce Culbertson's monitor?  It's pretty neat, and exists...
<
<If it knows about the symbolic executable, like kadb it will work.
<The problem is, among other things, we *don't* know what the
<executable format of our kernel will be, since we do not know what
<the O/S is going to be.  My preference, right now, is MACH with
<niceties from Tahoe/BSD and vnode interface like SunOS.  Waiting
<for the Stallman weenies to finish is pie-in-the-sky right now and
<I have _not_ heard anything about SVRx to make design commitments.
<MINIX is not sufficient since it will be a *year* before anything
<stable will be available for PC's and Amigas, let alone small
<potatoes like our project.

Actually, the executable file format is a *VERY* minor issue.  The
symbol table format is a bigger issue.

The kernel, assuming it's Unix like, doesn't look at the symbol table
and doesn't care what it looks like.  It's only going to look at a few
bytes at the start of the executable to decide how big the text/data/bss
are and possibly where to load them and the like.

Neither changing the kernel to use a different executable file format
nor chaning a debugger (gdb anyone?) to use a different format would be
very hard.  Changing a debugger to use a different symbol table format
is a much bigger undertaking.

I also want to run Unix.  Preferably 4.3BSD-tahoe or MACH or something
similar.  But, I believe that it'll be a year -- or more -- before
that's a reality.  In the mean time, we need to run *something*.  Either
Bruce's monitor or MINIX or something.

I don't know anything about Bruce's monitor.

I expect it would be fairly easy to teach MINIX to understand BSD
executable file format.  I don't know what Bruce has done in porting
MINIX to the 32k, but in the MINIX 1.1 source code published in the
MINIX book, there's one function, read_header, in one file, mm/exec.c,
that looks at the header.  It's about a page of code.  It looks like it
would be very easy to change.

Regarding the symbol table format -- we need a format that will be
generated by a compiler and understood by a debugger.  How about BSD
stabs format?  That way, we can use gcc to generate the entries; gas to
assemble them; and gdb to use them...

Yes, there will be some work involved in getting them to work with
MINIX.  But, they already contain some, although buggy, support for the
32532.

If they're used, some work will be required to fix bugs in the 32532
support and to get them to work with MINIX.  But, I believe that it will
be significantly less work than what would be required to write them
>From scratch or port some other compiler, assembler, debugger over to
MINIX running on the pc532.

As to Richard Stallman and the GNU kernel, he's been waiting and waiting
and waiting for CMU to release a freed version of the MACH kernel.  And
he's stated that he doesn't intend to start on the GNU kernel until
either CMU does release a freed version of the MACH kernel, or he
becomes convinced that they never will, or he runs out of other things
to work on for the GNU project.

Someone at CMU announced in the comp.os.mach newsgroup on Jan 12th:

    CMU does plan to make the Mach kernel (without Unix compatibility support)
    available without external licenses.  This kernel has been running at
    CMU for over a year and is now up on Vax, Sun 3 and PMAX platforms.

    [...]

    Current plans have us distributing the pure kernel with the single
    server Unix environment to outside research groups in late spring.
    Access to the Unix server would still require Berkeley licensing
    but access to the kernel itself, Mach libraries, etc. would not.

I'm not interested in SVRx unless someone first convinces me that
there's nothing better.  And *I* get to decide what *I* consider to be
*better*...

<>Bdale
<
<--
<J.R. (Use the Source, Luke) Stoner
<  "Dying is easy,	| asgard@omni.com
<    comedy		| asgard@cpro.uucp
<      is hard."		| ...{apple,sgi}!koosh!asgard

David
--
David Taylor
taylor@think.com, ...{ames,bloom-beacon,harvard}!think!taylor

From owner-pc532%daver@mips.com Fri Feb  2 03:12:00 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Subject: SCSI references
To: pc532%tarpit@daver.uu.NET
Date: Fri, 2 Feb 90 1:42:15 EST
From: John L. Connin <johnc%manatee%uunet@daver>
X-Mailer: Elm [version 2.1 PL1]

I Thought the following message would be of general interest.

	------------------------------------------------------
From: jlohmeye@entec.Wichita.NCR.COM (John Lohmeyer)
Newsgroups: comp.periphs
Subject: Re: SCSI stuff
Message-ID: <512@entec.Wichita.NCR.COM>
Date: 31 Jan 90 15:10:19 GMT
References: <9328@nigel.udel.EDU> <3037@becker.UUCP>
Reply-To: jlohmeye@entec.Wichita.NCR.COM (John Lohmeyer)
Organization: NCR Corporation, Wichita, KS
Lines: 91
Keywords:

In article <3037@becker.UUCP> douglee@becker.UUCP (Doug Lee) writes:
>In article <9328@nigel.udel.EDU> gdtltr@freezer.it.udel.edu (Gary Duzan) writes:
>>   Also, if it comes to it, you have my vote for comp.periphs.scsi.
>attention, has anyone seen a book on scsi. I would like something which is
>technical, but can take a technically minded person from ground zero to 
>complete understanding. Thanks  <<<Doug>>>

There are several references you (or others) might be interested in:

"SCSI: Understanding the Small Computer System Interface" is available at
some bookstores and can be ordered from Prentice Hall.  The ISBN # is
0137968558.  You can order this book directly from Prentice Hall by calling
(201) 767-5937 or write to Prentice Hall Book Distribution Center, 
Route 59 @ Brook Hill Drive, West Nyack, NY 10994.  This book mostly covers
SCSI-1, but does explain the relationship of SCSI-1 and SCSI-2.  It is
especially well-suited for those who want to learn about SCSI without
wading through all the legalistic stuff in the standard.  I was told the
price is in the $15 - $20 range.

"The SCSI Bench Reference" is available from ENDL Publications, 14426 Black
Walnut Court, Saratoga, CA 95070 or phone (408) 867-6642.  This publication
is aimed at engineers and technical support personnel who are working with
SCSI and don't want to lug around the standard.  It is based on the SCSI-2
standard (~600 pages), but it omits a lot of the less-commonly needed 
information to get down to less than 200 pages.  I think its best added
value is in its excellent timing diagrams -- some engineers just can't
relate to the English timing descriptions in the SCSI standards.  This
book is pricey at $195, but they do offer deep discounts for additional
copies ordered at the same time.

The following information from the SCSI BBS tells how to order copies
of the various SCSI standards and draft standards.  I need to update it
with ordering information on the ISO SCSI Standard (IS 9316:1989) when
I get some time, but the ISO standard is essentially the same as the
ANSI standard.

----------------------- clip here ---------------------------------------------
                       How to Get SCSI Standards

   This file has information on obtaining the various SCSI standards.

   American National Standard (ANSI) for Small Computer System Interface
   (SCSI), X3.131-1986.  This approved standard is available from:

        American National Standards Institute
        1430 Broadway
        New York, NY 10018
        Sales Department: (212) 642-4900

   The price is $25.00 each for 1-9 copies.  Quantity discounts are
   available.  If your company is a member of ANSI, you may also be
   eligible for a discount.


   The enhanced Small Computer System Interface (SCSI-2) is not an approved
   standard.  It is a working document of the X3T9.2 Task Group that is
   intended to revise and enhance X3.131-1986.  Copies of the most recent
   version of this document can be obtained from:

        Global Engineering Documents
        2805 McGaw
        Irvine, CA 92714
        (800) 854-7179
        (714) 261-1455

   Global has identified this document as X3.131-198X. (The latest revision
   is Rev 10b with a date of 8/22/89.)


   The European Computer Manufacturers Association (ECMA) has also prepared
   a standard on SCSI.  It is known as: Standard ECMA-111 and was published
   in December 1985.  Free copies are available from:

        European Computer Manufacturers Association
        114 Rue du Rhone
        1204 Geneva (Switzerland)


   (File HOW2GET.TXT last updated 9/8/89)
-------------------------------------------------------------------------------

John Lohmeyer         J.Lohmeyer@Wichita.NCR.COM
NCR Corp.             uunet!ncrlnk!ncrwic!entec!jlohmeye
3718 N. Rock Rd.      Voice: 316-636-8703
Wichita, KS 67226     SCSI BBS 316-636-8700 300/1200/2400 24 hours


From owner-pc532%daver@mips.com Fri Feb  2 13:29:19 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Fri, 2 Feb 90 15:30:43 GMT
From: Ari Lemmke <arl@cs.hut.fi>
To: pc532@daver
Subject: using floppy, hard disks and X with pc532, OPSYS stuff
Organization: Helsinki University of Technology, Finland


	Is there any cheap PC SCSI controller, which can
	act also slave ?

	So I'm not any-so-and-so-hater, and I'd like to
	have use for my old PCs as pc532 I/O processors.

	I'm planning to have AT-computer floppy and
	hard disk server, and also X display could be
	VGA ... I'm going to have some kind of protocol
	on top of SCSI so that it is possible to have
	many PC's I/O boards supported. There are not
	enough time to make all those different I/O
	card projects as SCSI slaves, also I personally
	don't have enough money to put expensive
	systems, but PCs are cheap bulk. So why wouldn't
	I use those ?

	Have you looked x-kernel, which is possible to
	take with ftp from cs.arizona.edu, it could be
	ideal OS for et532 ?

	Here's info about it:

		The x-kernel is a configurable operating system kernel
		in which communication protocols define the fundamental
		building block. The x-kernel supports multiple address
		spaces, light-weight processes, and an architecture for
		implementing and composing network protocols. The
		primary objective of the x-kernel is to facilitate the
		implementation of efficient protocols. In particular,
		the x-kernel supports the construction of new protocols
		from existing protocol pieces, it serves as a workbench
		for designing and evaluating new protocols, and it
		provides a platform for accessing large, heterogeneous
		collections of network services.

	It has TCP/IP, UDP, RPC's and some drivers.

	searching, if anyone knows:
		PC-cards:	HP-IB (have 1/4" tape to it), could use	
				as pc532 back up ...
				SMD (have some "cake" drives), could
				use as pc532 disk's.

	arl

From owner-pc532%daver@mips.com Fri Feb  2 13:29:29 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Thu, 1 Feb 90 14:24:56 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: Floppy interface, etc.
Cc: jcallen@maxzilla.encore.com

Just a few clarifications on the board I'm working on:

- It will use the DP8473 to drive the floppy. This chip supports
  250kbit, 300kb, 500kb and (as yet unused) 1mb data rates. It will
  support all 4 flavors of IBM disk drives. It is also capable of
  driving 8" drives (for you CP/M folks).  There are 4 ports into
  the chip, so if you want to have one of each kind in your system,
  go right ahead and do it. :-)  The disk formatting choices will
  (at least initially) be up to the host (532) to determine, since
  the initial firmware will just pass through commands to the floppy.
  The chip has an analog data separator and uses external filter
  components which it selects automatically as the speed is changed.
  This is a NICE chip. It is also cheap ($13.40 in small quantities).

- The 8255 (as I will use it) supports 2 parallel ports, which can
  be programmed independently as input or output ports. I don't plan (at
  least initially) to support the ports in the software. You can use
  them as you see fit. I do plan to provide interrupts for the ports,
  so we can write an interrupt-driven printer driver.

- The HD64180 (still my top choice for CPU) includes two serial ports,
  programmable data rates, good for at least 38.4kbit. Both will be
  available; one will be used by the ROM monitor (but not dedicated
  to it, obviously). The chip also includes 2 DMA channels, which I 
  plan to dedicate to the SCSI and floppy interfaces. There are also
  on-chip interrupts for the serial ports. The CPU will run at a tad
  over 9 Mhz.

- I plan on at least 256k of memory, maybe 8x256kx1, but I hope
  2x256kx4. There will also be 32k of ROM and maybe 32k of static
  RAM. I hope to use a PLCC version of the chip, which will allow
  up to (as I plan to use it) 512k of memory. The memory interface
  is the iffyest part of the design right now. I will try to support
  larger static RAM chips if I can find the $#@ pinouts.

- The onboard ROM (well, EPROM) will contain a simple monitor and
  download capability; I hope to be able to also load software over
  the SCSI channel. There is certainly no reason why one of the serial
  ports on the pc532 can't be used to talk to the floppy controller.

- I hope to fit this mess onto a standard XT board that plugs into the 
  pc532. I will certainly include a header for the SCSI, though, so if
  you don't want to eat up a slot, you don't have to. But this will be
  a LOT of I/O on one board, so I certainly consider it worth the slot!

- I'm definitely in the market for cheap development tools; a small
  c was mentioned. I do NOT want to spend much money on tools (I'm
  already pushing the budget just building the pc532).

- Speaking of $$$, I am hoping that the entire board (with 256k) will
  come in at around $150, not including a custom PC board (in other
  words, I supply a schematic and suggested layout and you wire it). 
  So it is NOT a dirt cheap solution, but there is a lot of power on the
  board. I have no idea what would be involved in creating a PC board
  for it, I've never done that.

Note that this entire project is vaporware at this point (but I really
have started the design and I'm acquiring parts). Don't look for
results before May, and it could easily be later.

To Bdale, Jon and Neil: the parts are ordered, should be here in 2
weeks. I will send you mail confirming your addresses and showing
an exact amount (including 5% sales tax and maybe a buck or two for
postage).

Regarding distribution media: I favor 3 1/2" 1.44MByte floppies.
I ALSO favor using the net when practical, since this requires
NO additional hardware (except for a modem, and we ALL have one of
those, eh?). Hopefully we can port UUPC (or equivalent) early on
and connect as we wish.

-- Jerry Callen
   jcallen@encore.com
   (508) 460-0500 (w)
   (617) 876-5330 (h)

From owner-pc532%daver@mips.com Fri Feb  2 13:30:35 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
Date: Fri, 2 Feb 90 10:06:14 pst
From: Bruce Culbertson <culberts%hplwbc@hplabs.hp.com>
To: pc532@daver.UU.NET
Subject: Re: Systems integration standards, anybody?

Hi Gang,

There has been a lot of concern lately about

  * ROM monitors
  * how to boot an OS
  * how to get software onto our hard disks
  * executable formats and their symbol tables
  * debuggers
  * grand software architecture

and so forth.

As some of you may know, Dave Rand and/or I will port Minix to the
pc532.  If either of us had just a little free time, this would be
done by now -- Minix is already running happily on my 32016.  Because
so little needs to be done to move my Minix from the 32016 to the 32532,
I would be very surprised (and delighted) if someone got another OS
running on the pc532 first.  I, and probably Dave, do not intend to
make any grand plans or unilateral architectural decisions.  Instead,
we just want there to be some software available at about the same
time the pc532 hardware becomes available.  To achieve that goal,
my inclination is to take existing software and modify it as little
as possible.

A friend and I wrote the monitor I am using.  It is quite simple but
allows stepping and breakpointing and includes a disassembler.  Dave
has something similar.  Booting on my system consists of three monitor
commands:

	read 0 200000 40
	set pc 200000
	run

(The first command reads the first 40 blocks from the floppy disk
into memory starting at address 200000.)  It's primitive but it works
admirably and is independent of executable and file system formats.
As primitive as my debugger is, it was sufficient for porting an
operating system.  I create the boot floppy with the command "dd
bs=1024 if=minix of=/dev/fd1 skip=1".  My a.out format, by the way, is
virtually identical to Unix edition 7 and I have the debugging stuff
turned off in GCC.  My assembler supports the 32532 extensions.

Of course, the pc532 does not have a floppy.  This concerns me.  About
the only thing we all will have is a serial interface.  This could be
used initially for loading the OS, but will get old in a hurry.  Those
of us with existing SCSI computers can use them to build our hard disks
but this, too, will quickly become painful.  We need a gestapo to
choose a tape or floppy scheme and jam it down all our throats.
Perhaps we should all buy the SCSI floppy controller Des found --
it has the huge advantage of being available now.

I am quite sure that the initial pc532 software will be a lot like
my 32016 system which I just described.  It may be ugly in comparison
to ready-made computers, but we have to start somewhere.  It will give
us a base upon which to build all the neat things people have been
talking about recently.  Getting that first tow-hold -- a computer
which can recompile its own software -- is vitally important.  After
that, beauty, bells and whistles will surely follow.  In my experience,
large projects which attempt to meet all conceivable objectives on
their first release are doomed to failure.

Bruce Culbertson

From owner-pc532%daver@mips.com Mon Feb  5 12:44:20 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Mon, 5 Feb 90 09:35:08 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver.UU.NET
Subject: Re: Boot procedure.

[In the message entitled "Re: Boot procedure." on Feb  5, 15:22, Ken Seefried iii writes:]
> 
> On Feb 4,  3:11am, gatech!sibyl.eleceng.ua.oz.au!ian wrote:
> } 
> } I reckon I will be downloading over a serial line from my ICM 3216 in
> } the first instance. GDB supports remote debugging over a serial line
			?? my ignorance, but did you mean DBGxx?
> } so that means all the source files, executables etc can live on a known
> } working machine, while the kernel is being debugged. All that is needed
> } is a pretty simple ROM monitor on the pc532 end of the serial line.
> } 
> }-- End of excerpt from gatech!sibyl.eleceng.ua.oz.au!ian
> 
> Last I checked, this code was very experimental and worked only on 
> 68000s.  I dunno how hard it would be to get going for us...

On the ICM3216 running unix NSC has a nice toolset called DBGxx. Dave & I
have used this software many a time, it is very powerful and requires very
little on the target end, other than a small monitor (<8k) and a serial
port. We have this monitor ported to the PC532 already, in fact its the only
code that is actually burnt into EPROM at this time. All the rest of the
stuff we download via DBG, which gives us breakpointing, single stepping and
source level debugging. Unfortunately NSC never ported the environment to
any other O.S. platform (i.e. MSDOS etc).  Of course most people aren't
going to have access to the DBGxx environment, a pity since its one of the
nicest things NSC ever did for a debug environment, probably essential at
the time since they had little (or very poor) ICE support in the early days.
HP and TDS now support the 32cg16 and 32532/gx32.

regards,


-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Mon Feb  5 13:28:52 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Mon, 5 Feb 90 10:20:32 PST
From: des@dtg.nsc.com (Desmond Young)
To: pc532@daver.UU.NET
Subject: Re: Boot procedure.

Hi,
  now the DBG environment can be used over Ethernet. The tools run on
a Sun or VAX, and the monitor has an Ethernet driver (to a National
eval board). Very slick, but .... how many of us have Sun workstations
(or VAXes) in our bedrooms? :-)
Des.

From owner-pc532%daver@mips.com Mon Feb  5 21:31:18 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Subject: Bring-up pc532-Minix..
To: pc532%tarpit@daver.uu.NET
Date: Mon, 5 Feb 90 11:20:31 EST
From: John L. Connin <johnc%manatee%uunet@daver>
X-Mailer: Elm [version 2.1 PL1]


First, some questions for Dave R / Bruce C..

(1)  Can the pc532-Minix rs232 device driver send/receive binary data 
without error ??  The reason I ask is the PC-Minix Version 1.1 
and 1.3 rs232 device driver could not.  Bruce Evans release a tty device 
driver for version 1.3 which fixed this problem.  I believe this same 
device driver (with enhancements by Bruce Evans) are incorporated into 
release 1.5.

(2)  Under which operating systems will the pc532 binary tools (ie. as, cc, 
ld, etc) compile (eg. MsDos, Unix, etc) ??

(3)  Will the first issue of pc532-Minix differences have a functioning 
device driver for the Adaptec AIC6250 and / or National DP8490 ??


The reason I ask is that generally, the initial "boot procedures" being 
discussed are more sopisticated than my experience base.

The approach I have been condemplating is to use the serial interface
as a command interface to the pc532 monitor.  And use one of the 
SCSI interfaces to load the OS image and subsequently during FS initialization
for reading in the root file system into ram disk.  Of course this implies 
the Monitor knows how to control the SCSI device, and the answer to (3)
is favorable.

Concerning reading the OS image, I am assuming that I can wire-wrap
a simple SCSI interface for my PC and feed the OS image from a 
file under either MsDos or Unix.

With regard to loading the initial file system image, I am thinking of
two different possibilities.  The first is similar to loading the OS
image -- load a file containing the initial file system image.  Minix
mkfs has the ability write either to a device or a file, and to copy
any specfied files to it.

The second approach is to incorporate the SCSI device driver into
PC-Minix.   Then use PC-Minix to create a filesystem on a SCSI hard
disk.  

Any comments pro or con on this approach ??


BTW:  This reminds me that I forgot to include PC-Minix Version 1.3
in the in the "Build List" I published earlier.  As I understand, Dave/Bruce 
will be distributing pc532-Minix as difference files relative to PC-Minix 
Version 1.3 do to copyright restrictions.

regards,
johnc

PS:  I have attached the latest Minix info sheet.  My first thought was 
to include only the section relating to purchasing PC-Minix from P-H.
However, I decided include the whole 100 yards since it also contains
words about copyrights, archive sites, etc.

	------------------------------------------------------

From: overby@plains.UUCP (Glen Overby)
Newsgroups: comp.os.minix
Subject: Minix Information Sheet (Last Changed: 2 Feb 1990)
Summary: Everything you ever wanted to know about Minix on the networks, 
	but never dared to ask!
Keywords: info answers
Message-ID: <InfoSheetMarch90@plains>
Date: 2 Feb 90 18:01:36 GMT
Expires: 1 Mar 90 00:00:00 GMT
Reply-To: overby@plains.nodak.edu (Glen Overby)
Followup-To: comp.os.minix
Organization: North Dakota State University, Fargo ND, USA
Lines: 473

/* Changed this month:
	Ran everything thru a spelling checker!
	New archive site in Australia

Send Compatability List updates to Alan F. Perry,     allan@dhw68k.cts.com
Send all other updates to Glen Overby,  overby@plains.nodak.edu

 */
[Most recent change: 2 Feb 1990 by overby@Plains.nodak.edu (Glen Overby)]
[Original From ast@cs.vu.nl (Andy Tanenbaum ) 88/02/23]

MINIX INFORMATION SHEET

1. WHAT IS MINIX?
MINIX is an operating system that is a subset of UNIX Version 7.   It  con-
tains  nearly all the V7 system calls, and these calls are identical to the
corresponding V7 calls.  It also includes a  Bourne-compatible  shell,  and
close  to  100 utility programs, including cc, grep, ls, make, etc.  To the
average user, it is effectively V7 UNIX.  If you dig deep enough, you will,
however, find some differences.

The  MINIX  kernel  has  been  written  from  scratch  by  Andy   Tanenbaum
(ast@cs.vu.nl).   It  does  not  contain ANY AT&T code at all.  The utility
programs have been written by Andy Tanenbaum, his students, and a number of
other  people,  including  people on USENET.  None of the utilities contain
any AT&T code either.  The shell, the Pascal and C  compilers,  make,  etc.
have  all been completely redone.  As a result, this code is not covered by
the ATT UNIX license, and it can be made available.

2. HOW CAN I FIND OUT MORE ABOUT MINIX?
MINIX is described in detail in the following book:

     Title:       Operating Systems: Design and Implementation
     Author:      Andrew S. Tanenbaum
     Publisher:   Prentice-Hall
     ISBN:        0-13-637406-9   (Hardcover)
                  0-13-637331-3   (Paperback, outside of U.S. and Canada)

There are also French and Spanish translations of the book available, and a
German  version is due out soon.  The paperback MINIX Reference Manual is a
subset of the book; It contains only the MINIX  specific  information,  not
the  general  background stuff on operating systems that the book contains.
The software package does not contain a manual; this is  contained  in  the
appendices  to  the book, which also contain a complete source code listing
(in C) of the version 1.1 MINIX kernel.

3. HOW CAN I GET MINIX?
MINIX is being sold by:

     Prentice-Hall
     Englewood Cliffs, NJ 07632
     1-800-223-1360
     1-201-767-5937
     1-800-624-0023 (Software Department)

     Prentice-Hall Int'l
     66 Wood Lane End, Hemel Hempstead, Hertfordshire HP2 4RG England  (+44
     442 231555)

     The Minix Centre
     Forncett End, Norwich, Norfolk, England NR16 1HT (0953-89345)

When ordering it, please specify one of the following versions:

     MINIX 1.3 for 640K IBM PC                   $79.95  (0-13-583444-9)
     MINIX 1.3 for 512K IBM PC/AT                $79.95  (0-13-583303-5)
     MINIX 1.1 sources on mag tape               $79.95
     MINIX 1.3 code + reference manual (PC)      $116    (0-13-584426-6)
     MINIX 1.3 code + reference manual (AT)      $116    (0-13-584418-5)
     MINIX-PC upgrade (1.2 to 1.3)               $29.95  (0-13-584723-0)
          (Sources *ONLY* -- you will need to already have
          a working PC-Minix system to use this)
     MINIX 1.1 for the Atari ST                      $79.95 (0-13-584392-8)

     Textbook: Operating Systems: Design and Implementation (0-13-637406-9)
     Reference Manual: MINIX for the IBM PC, XT, and AT (0-13-584400-2)


The PC version runs on many IBM-compatible machines, but check the Compati-
bility  Report for your machine and hard disk to make sure.  The PC version
is distributed on 5.25-inch 360K diskettes, and the AT version  is  distri-
buted on 5.25 1.2M diskettes.  The only other difference in the two is what
hard disk driver they are compiled with (an XT driver for the PC and an  AT
for the AT).  In both cases you get sources for all available drivers.

The Atari version will run on any Atari ST, from  a  512K  machine  with  1
floppy  to  a  Mega  ST  with 4M and 16 hard disks.  It works better on the
latter.  Distribution is on 3.5-inch diskettes.

All full distributions contain executable binaries and the complete  source
code.

4. WHAT CPUS DOES MINIX RUN ON?
MINIX was originally written for the IBM PC, XT, and AT.  It has since been
ported to the NS 16032 and the 68000 (Atari ST).  It will also work on many
386-based machines.  A list of clones on which MINIX  has  been  tested  is
available  in the "Minix Compatibility Report" (see vm1.nodak.edu and other
archive sites for a copy).  These tests apply to Version 1.1 and  1.2.   It
is thought that 1.3 runs on everything that ran 1.2, and more.

5. IS MINIX PUBLIC DOMAIN?
No.  MINIX has been copyrighted by Prentice-Hall.  Prentice-Hall has decid-
ed  to  permit  a limited amount of copying of the sources and binaries for
educational use.  Professors may make copies for students in their  operat-
ing systems classes.  Academic researchers may use it for their new experi-
mental machines, and things like that.  A small amount of  private  copying
of  diskettes for the use of personal friends is ok, but please do not make
more than 3 copies from each original.  Prentice-Hall is trying to be  more
reasonable than most software publishers.  Please do not abuse this.    On-
line repositories of the full source code distribution are  not  permitted.
All commercial uses of MINIX require written permission from Prentice-Hall;
for the most part, they are willing to grant such permission in return  for
a royalty on sales.

6. WHAT PROGRAMS COME WITH MINIX
The list below gives the programs that are distributed with Version 1.3:

animals ar ascii asld ast at atrun badblocks banner basename cal cat cc cdiff
chgrp chmem chmod chown clr cmp comm compress cp cpdir crc cron date dd df
diff diskcheck dosdir dosread doswrite du echo ed elle ellec expr factor
fdisk fgrep file find fix fsck getlf grep gres head help kill libpack
libupack ln login lorder lpr ls make mined mkdir mkfs mknod more mount mv nm
od passwd paste patch pr prep printenv pwd rcp readall readclock readfs rev
rm rmdir roff sed sh shar size sleep sort spell split strings strip stty su
sum sync tail tar tee term termcap test time touch tr traverse treecmp true
tset tsort tty umount uncompress uniq update uudecode uuencode vol wc whereis
which who whoami zcat

Various other programs have been posted to the net, and should be available
>From the archives.

7. HOW DO I KEEP UP TO DATE ABOUT MINIX.
If you are on USENET, subscribe  to  newsgroup  comp.os.minix.   There  are
about 10,000 people in this group, and new software, bug fixes, and general
discussion about MINIX take place here.  If you are on BITNET  or  ARPANET,
you  can get this newsgroup via a mailing list by sending a message (either
interactive or mail) to listserv@vm1.nodak.edu or listserv@ndsuvm1 saying:

          signup minix-l Your_Full_Name

or  by  sending  a  request  to  the   list   maintainer   at   info-minix-
request@udel.edu

8. HOW MANY VERSIONS OF MINIX ARE THERE AND HOW DO THEY DIFFER?
At present there are three versions for the IBM PC line: 1.1, 1.2, and 1.3.
The  IBM  V1.3  contains many bug fixes and other improvements over 1.1 and
1.2.  In particular, although V1.1 works fine  with  genuine  IBM  PCs,  it
gives  trouble  on  some  clones,  especially  hard disk problems.  In this
respect V1.2 is much better.  V1.3 has many enhancements over 1.2,  includ-
ing  networking and RS232 support.  Both V1.1 and V1.2 are obsolete and are
no longer available from Prentice-Hall.

Version 1.5.0 is the most recent version to be released to the network, but
it is not available from Prentice-Hall.

There is one version for the Atari ST line, V1.1  which  is  equivalent  to
PC-Minix V1.3.

9. ARE THE MESSAGES POSTED TO COMP.OS.MINIX SAVED ANYWHERE?
Yes.  There are many sites which archive everything from complete copies of
all articles posted, to summaries of the more interesting articles, to use-
ful sources and updates.

The first place to look for archives is on your own (or a  nearby)  system.
There are many sites which maintain local archives and are not listed here.
If that fails, try an archive site in your area and/or on a  network  which
you  are  also on.  If you want very large amounts of material from the ar-
chives, talk to one of the maintainers about mailing a tape.  Surface  mail
is cheap.

Please restrict your use of FTP sites to non-business hours.

Abuse of the archives, especially thru mail, will cause bad carma.

9.1 Internet: Bugs.Nosc.Mil
Bugs.Nosc.Mil archives comp.os.minix news articles of lasting interest  and
other Minix material, such as a list of machines reported to be able to run
Minix.  Material of widespread interest includes diffs for updating v1.1 to
v1.2  and v1.2 to v1.3, diffs for cross compilation under MS-C and Turbo-C,
the new C compiler, the editor Elle v4.1, and recently a port of C-Kermit.

This material is available by anonymous FTP (during non-business hours)  on
bugs.nosc.mil  [128.49.16.1]  in  directory pub/Minix.  There are two index
files for the archives, "subjects" and "subjects.ast", the latter being ar-
ticles posted by Minix author, Andrew Tanenbaum.  The file names are mostly
just the Message-Id of a news article.

This archive is mantained by Vincent Broman,  code 632, Naval Ocean Systems
Center, San Diego, CA 92152, USA Phone: +1 619 553 1641
Internet: broman@nosc.mil   Uucp: sdcsvax!nosc!broman

9.2 Internet: Simtel20.Arpa
A limited archive  of  MINIX  related  material  is  available  from  wsmr-
simtel20.army.mil  [26.2.0.74]  in  the  directory PD3:<MISC.MINIX>.  These
same  files  are  available  to  Bitnet  from  the   simtel20   relays   on
LISTSERV@RPICICGE or LISTSERV@NDSUVM1 in the same directory.

To get these files from LISTSERV@RPICICGE, use the /pddir and  /pdget  com-
mands for a directory listing and file retrieval, respectively.

9.3 Internet in Australia: sirius.ucs.adelaide.edu.au
The machine:
                sirius.ucs.adelaide.edu.au

now has a small minix archive in the directory pub/minix that can be accessed
by anonymous ftp.  At present the directory contains:

-rw-r--r--  1 root          535 Jan 25 17:07 FETCHME_FIRST
-rw-r--r--  1 root       126351 Jan 25 17:07 clam-1.3.3.tar.Z
-rw-r--r--  1 root       147397 Jan 25 17:07 elvis-1.0.1.tar.Z
-rw-r--r--  1 root        33065 Jan 25 17:07 ibm-v1.5.0fixes.tar.Z
-rw-r--r--  1 root      1911343 Jan 25 17:07 ibm-v1.5.0frm1.3.tar.Z
-rw-r--r--  1 root         1608 Jan 25 17:07 st-v1.5.0fixes.tar.Z
-rw-r--r--  1 root      1812318 Jan 25 17:07 st-v1.5.0frm1.1.tar.Z

Other `significant' postings may be added in the future. Space and time
permitting :-)

Could overseas users please avoid accessing this australian site.
It will be *very*much*slower* than any of your `local sites'.

                                Andrew Cagney
                                cagney@cs.ua.oz.au

        The fetch me first file contains the below...

Naming:
        ibm             : ibm only
        st              : atari st only
        N.N.NfrmM.M     : upgrade kit from version M.M to version N.N.N
        N.N.Nfixes      : *UNOFICIAL* comments/notes/patches to version N.N.N
                          updated occasionally.
        .tar.Z          : tar'ed with `pdtar czf'.
Other notes:
        - the st upgrade kit includes (I hope) the files needed from the ibm
          upgrade kit.
        - the files are compressed -b16. For minix you will need to uncompress
          them on a big machine first.

Thanks to Gordon I, Vera M and Mark P for doing a lot of the work.

                                Andrew Cagney
                                cagney@cs.ua.oz.au

9.4 Bitnet: NDSUVM1.BITNET / Internet: vm1.NoDak.Edu
Two archives of Minix information are  kept  here  at  North  Dakota  State
University.   The  largest  is an automated log of all messages sent to the
MINIX-L list (the Bitnet side of Info-Minix), and the other is an  manually
organized  archive  of  sources  sent  to the list.  Both are accessible by
Anonymous FTP on the Internet, and by making a request  by  mail  from  any
other connected network (such as Bitnet or UUCP).

Anonymous FTP users will find two directories: LISTARCH  and  MINIX,  while
users  of  the  LISTSERV  will find the directories MINIX-L and MINIX.  The
MINIX-L directory is a subset of the  LISTARCH  directory,  the  latter  of
which contains logs of all the mailing lists we host.


Our machine is:

     Internet: listserv@vm1.NoDak.EDU [134.129.111.1]
     Bitnet: listserv@ndsuvm1
     UUCP: psuvax1!ndsuvm1.bitnet!listserv
          **NOTE** Many Unix sites  have  had  difficulty  contacting  this
          server  because  it  is  VERY  stringent about what it accepts as
          valid mail.  Also, replies to uucp will  *not*  follow  the  same
          path back as the request was sent on.  If you are a UUCP site not
          listed in the UUCP maps, listserv will NOT be able to respond  to
          you.


OBTAINING FILES WITH ANONYMOUS FTP

Our site accepts FTP logins with the  user  "anonymous"  and  any  password
(network conventions generally say you should use your login name, but that
is not required).  We ask that you limit your usage  of  this  to  off-peak
hours, such as evenings and weekends.

Be warned that this machine is an IBM 3090 running VM/CMS and uses  EBCIDC!
The  translation  table we use does not seem to cause problems when talking
to native ASCII machines.  You  should  think  twice  before  doing  BINARY
transfers, since all the Minix files are stored as text.

A normally up-to-date index of available files in the MINIX directory, with
descriptions, is kept in the file "MINIX INDEX".


REQUESTING A FILE USING THE LISTSERV

If you do not have Internet access, you may request files be sent to you by
our  LISTSERV  file server by sending it commands in either a file (on Bit-
net) or the body of mail (from anywhere else).

To obtain a list of the files, the INDEX command is used:

     INDEX <directory>

where <directory> is either MINIX-L or MINIX.

The GET command will instruct LISTSERV to send you a file, such as:

     get minix info minix

to get the file "MINIX INFO" from the group "MINIX".  That file is  a  copy
of  the monthly "Minix Information Sheet" posting.  The Minix Compatibility
list is available in the file "MINIX COMPAT".

Due to the 80-character per line (punched card) limit on Bitnet mail,  many
of  the  files will be shipped using an encoding scheme that allows logical
lines to be split up into many physical lines. On Bitnet, this is  normally
the IBM "DISK DUMP" or "NETDATA" format.

The default for other networks is "Listserv Punch".  This requires  a  spe-
cial program to decode the file once it has arrived at your site.  Informa-
tion on obtaining a program to decode listserv punch format  is  sent  with
each encoded file.

If you would rather have a file sent to you uuencoded, you may specify that
in your GET command:

             get minix info minix f=uuencode

please note that there are many files, such as the  1.3  to  1.5.0  update,
which are stored in uuencoded format.


ACCESSING THE MAILING LIST LOGS WITH LISTSERV

The mailing list logs are kept in the  "MINIX-L",  or  "LISTARCH"  section,
with all filenames of the form:

     MINIX-L LOGyymmw

where "yy" is the year, "mm" is the numeric month and "w" is an  alphabetic
character from A to E indicating what week of the month.  Several months of
log files are kept on-line, the number depending on disk space  availabili-
ty.

If you are looking for a specific article, or set of articles, you can per-
form  searches  on this directory using the Database functions of Listserv.
For example, to obtain a "Subject" index of the MINIX-L archives, send  the
listserv a file or mail with the following "job" in the message body:

//      JOB  Echo=No
Database Search DD=Rules
//Rules DD   *
search * in minix-l since 89/12/01
index

and you will be sent a file containing all of the 'Subject:' lines sent  to
the  mailing  list  since  December 1, 1989.  If you wish to request one or
more items, replace the 'index' line in the above  job  with  "print  [ref-
num]",  where "refnum" is the reference number from the index listing.  Do-
cumentation on this and other database functions is  available  by  sending
the command "INFO DATABASE" to the listserv.

To obtain more information on the listserv, send it the command:

     INFO ?


This archive is maintained by Glen Overby at North Dakota State University,
Fargo, ND USA

Glen Overby     info-minix List Maintainer      <minix@plains.nodak.edu>
                uunet!plains!minix (UUCP)       minix@plains (Bitnet)

9.5 BBS: The Mars Hotel
For people without a network connection, there is a PC-based
Electronic Bulletin Board System (BBS) that has
carried the traffic of Usenet's Comp.os.minix steadily since August,
1987 as well as a formal
Minix archive.

The BBS is not a true gateway to Usenet, like some Fidonet nodes are;
rather it is a "delivery service" whereby new comp.os.minix articles
are gathered daily and posted as messages on the BBS.  Long articles
are automatically ARC'ed and posted to the file area for downloading.
Raw traffic is kept for about 2 months.

Once a month the articles of lasting interest from the previous month are
saved into several ARC files, all less than 100k, to make downloading easier.
For any given month, the index of articles is in MNXyymmA.ARC,
and the actual articles start in MNXyymmB.ARC.
You can just download the index, then download the ARC files that contain
articles of interest to you.
A complete index is always in MNXINDEX.ARC.

Call:
     The Mars Hotel BBS, (301)277-9408 (PC-Pursuitable)
     300,1200,2400 baud, 8,n,1.

     No registration required, no donations accepted.
     Everyone gets 60 minutes/day.
     No upload/download ratios (but don't be a jerk!)

Spread the word to those without net access.

This BBS is run by James da Silva.
UUCP:   uunet!mimsy!jds
Internet: jds@mimsy.umd.edu

9.6 England (Janet) uk.ac.ic.doc (icdoc.uucp)
An archive of the worthwhile postings from the comp.os.minix
newsgroup is available from uk.ac.ic.doc either via mail or by GUEST
niftp.  For details about how to access this service send a mail
message with NO Subject: field to:

     info-server@uk.ac.ic.doc

and a message body of:

     request catalogue
     topic minix
     request end

This will mail you back details of the various ways to obtain the files.

This service is only available inside the UK.  We have no funds to
send such mail internationally.

This archive service is run by Lee McLoughlin.
Janet: lmcl@uk.ac.ukc, lmjm@uk.ac.ic.doc
DARPA: lmjm%uk.ac.ic.doc@ucl-cs
Uucp:  lmjm@icdoc.UUCP, ukc!icdoc!lmjm


9.7 Atari ST GNU C Compiler (GCC)
     A distribution of Minix AtariST gcc and associated libraries and tools
are available for anonymous FTP from dsrgsun.ces.cwru.edu [129.22.16.2],
directory ~ftp/pub/minix/gcc-1.34* (cd to pub/minix).

9.8 IBM PC (80386) GNU C Compiler (GCC)
     A port of the GNU C Compiler is available for Minix from both the Mars Hotel
BBS in the file BRUCECC.TAZ and via anonymous ftp from the
host hobbes.cs.umd.edu (IP address 128.8.128.41), in the minix directory.
This compiler will compile programs that will run in 32-bit mode on an 80386.

10. WHAT PC CLONES HAS MINIX BEEN TESTED ON?
There is a long list of computers which have been verified to work with Minix.
It is posted monthly, along with this Information Sheet and is available from
several archive sites.

-- 
		Glen Overby	<overby@plains.nodak.edu>
	uunet!plains!overby (UUCP)  overby@plains (Bitnet)






 


From owner-pc532%daver@mips.com Tue Feb  6 07:08:07 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
Date: Mon, 5 Feb 90 10:56:55 pst
From: Bruce Culbertson <culberts%hplwbc@hplabs.hp.com>
To: pc532@daver.UU.NET
Subject: Re:  Device Driver, preferred location ...

> Interesting question -- assuming a message based operating system like
> Minix, ideally where should a device driver be located ?? ...
>
> In other words, the FS sends a message directly to the controller, instead 
> of the FS sending a message to a device driver bound to the kernel which
> in turn translates the request into one or more lower level SCSI transactions,

This is a nice idea but is not usually done for a number of practical
reasons.

First, SCSI prescribes not only the physical and electrical properties of
the bus, but also the functional properties -- there is a set of
commands which SCSI targets (in other words, devices) are obligated
to respond to.  You could, of course, use only SCSI's physical and
electrical layers, even though the result would not be legal SCSI.

So, why were SCSI and similar device interfaces designed this way?
Putting the device driver on the device side of the interface makes
the device OS-dependent.  (The SCSI command set already includes pretty
much all the functionality that can be specified without knowledge of the
operating system.)  For a number of reasons, OS-dependent devices
are not attractive.  A device manufacturer wants the largest possible
return on its R&D investment and, so, wants its products to be
usable with as many different kinds of computers and OS's as possible.
OS-independent devices also help to protect the customer's investment.
Since devices and CPU's often do not become obsolete at the same time,
customers want (demand) to be able to move old devices to new 
computers.

The designers of SCSI intended SCSI to be a device interface.  While
they define "device" quite broadly, SCSI still is not intended to
interconnect peers.  Hence, true SCSI probably would be a poor
choice to interconnect a distributed OS.  In a distributed OS,
it would make sense to load a particular device driver only on the
CPU to which the device is attached.  However, I think the driver
still should go on the CPU side of the device interface.

Bruce Culbertson

From owner-pc532%daver@mips.com Tue Feb  6 12:43:23 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Tue, 6 Feb 90 10:03:37 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: Minix distribution

>BTW:  This reminds me that I forgot to include PC-Minix Version 1.3
>in the in the "Build List" I published earlier.  As I understand, Dave/Bruce 
>will be distributing pc532-Minix as difference files relative to PC-Minix 
>Version 1.3 do to copyright restrictions.

I wrote to ast regarding the distribution of pc532 minix; I posted his response 
to this list about a month ago, but I managed to lose it here. :-( In summary,
though, he said that he had no problem with us shipping complete sources around
as long as we kept the volume to, say, 50 copies.  He also said that P-H would 
certainly have NO interest in pc532 minix as a "product" (due to the very
small pool of potential buyers). 

Personally, I plan to hold off buying Minix from P-H (I do, however, have The
Book) until an "official" 1.5 is released. I won't *HAVE* 1.3 sources to do
diffs from. So I really hope that pc532 Minix will be distributed as complete
sources!

>regards,
>johnc

-- Jerry Callen
   jcallen@encore.com
   (508) 460-0500 (work)
   (617) 876-5330 (home)

From owner-pc532%daver@mips.com Tue Feb  6 12:58:05 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
From: dlr@daver.UU.NET (Dave Rand)
Date: Tue, 6 Feb 90 09:54:07 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.UU.NET
Subject: Re: Minix distribution

[In the message entitled "Minix distribution" on Feb  6, 10:03, Jerry Callen writes:]
> I wrote to ast regarding the distribution of pc532 minix; I posted his response 
> to this list about a month ago, but I managed to lose it here. :-( In summary,
> though, he said that he had no problem with us shipping complete sources around
> as long as we kept the volume to, say, 50 copies.  He also said that P-H would 
> certainly have NO interest in pc532 minix as a "product" (due to the very
> small pool of potential buyers). 
> 

We already have more than 50 boards, so more that 50 copies will be going
out. I don't think that shipping complete sources will be an option.
We are also considering doing another run of boards in late Feb or early
March, but additional kits of parts will not be available (it is quite
hard to organize - but I'll be happy to get someone else to do it :-)

If you have any other alternatives for distribution, please let me know,
and I'll look into it. For now, diff's seem to be the only legal way.


-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr%daver@uunet.uu.net

From owner-pc532%daver@mips.com Tue Feb  6 14:32:23 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Tue, 6 Feb 90 11:12:35 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver
Subject: pc532 cases

Hi folks,
	Desmond Young reports that the pc532 will not fit into a real xt
clone case. The pc532 mounting holes are positioned as per an AT motherboard,
less the rightmost holes, and will fit into either an AT or baby AT case.

regards,

-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Tue Feb  6 14:43:26 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Tue, 6 Feb 90 13:43:02 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: Minix distribution

>If you have any other alternatives for distribution, please let me know,
>and I'll look into it. For now, diff's seem to be the only legal way.

Eeek, I guess I better get Minix on order, since I've heard horror stories
about P-H's shipping department. I really wanted to wait for 1.5...

What will the diffs be FROM? Do you or Bruce have a "virgin" Minix 1.3 for
the PC that you can use as a base? I'm really worried about getting a
correct set of sources.

>Dave Rand

-- Jerry "paranoid about kernel source" Callen
   jcallen@encore.com
   (508) 460-0500 (work)
   (617) 876-5330 (home)

From owner-pc532%daver@mips.com Tue Feb  6 17:03:14 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
Date: Tue, 6 Feb 90 12:49:38 pst
From: Bruce Culbertson <culberts@hplwbc.hpl.hp.com>
To: pc532@daver.UU.NET
Subject: Re:  Bring-up pc532-Minix..

Questions from John L. Connin...

> (1)  Can the pc532-Minix rs232 device driver send/receive binary data 
> without error ??  The reason I ask is the PC-Minix Version 1.1 
> and 1.3 rs232 device driver could not.  Bruce Evans release a tty device 
> driver for version 1.3 which fixed this problem.  I believe this same 
> device driver (with enhancements by Bruce Evans) are incorporated into 
> release 1.5.

My current tty driver is from version 1.3 and is real garbage!  So far
I have used it for little besides attaching a terminal and it is
adequate for that.  I am sure it is reliable at slow enough speeds but
I am not sure just how slow.

Most of the Minix code I am using is version 1.4.  It would sure be
nice to be up to the latest version (1.5), which is supposed to have a
number of performance improvements and bug fixes.  However, I think I
will place a higher priority on getting my current version to run on
the pc532.

> (2)  Under which operating systems will the pc532 binary tools (ie. as, cc, 
> ld, etc) compile (eg. MsDos, Unix, etc) ??

as, ld, ar, ranlib, nm:

I have used these on UTS (Amdahl Unix), HP-UX (HP Unix, both 680x0 and
HP-PA), MS-DOS, Mac, and Minix32k.

cc, cpp:

I have used these on UTS (Amdahl Unix), HP-UX (HP Unix, both 680x0 and
HP-PA), and Minix32k.


> (3)  Will the first issue of pc532-Minix differences have a functioning 
> device driver for the Adaptec AIC6250 and / or National DP8490 ??

Good question.  My 32016 has an NCR5380, roughly equivalent to the
8490.  Hence, the 8490 will likely be the first to work.  I do not
have a synchronous SCSI device to test the 6250 but Dave probably
does.

> And use one of the 
> SCSI interfaces to load the OS image and subsequently during FS initialization
> for reading in the root file system into ram disk.

Currently my monitor does not know about SCSI but a couple hours work
should fix that.  I've been meaning to make this addition for a long
time.  Dave's probably already talks to SCSI.

> Concerning reading the OS image, I am assuming that I can wire-wrap
> a simple SCSI interface for my PC and feed the OS image from a 
> file under either MsDos or Unix.

This could be a nice setup.  Someone could write some software to
make the PC emulate a SCSI device.  Request Sense, Read, and Write
are the only SCSI commands we need, so that should not be too hard.
Does such software exist already?  Then we could use the Minix
SCSI driver, which we need anyway, to read a Minix file system image
residing on the PC.  I think PC-SCSI boards are cheap -- maybe $35.
We cannot use the PROM's that come with them, though, because they
assume the PC will be the host.

I think I will either do this or get one of the SCSI/floppy boards
Des found.

> With regard to loading the initial file system image, I am thinking of
> two different possibilities.  The first is similar to loading the OS
> image -- load a file containing the initial file system image.  Minix
> mkfs has the ability write either to a device or a file, and to copy
> any specfied files to it.

I have often done this.  I create Minix file system images on my
68xxx workstation at work.  Then I transfer them to floppy disks.

> The second approach is to incorporate the SCSI device driver into
> PC-Minix.   Then use PC-Minix to create a filesystem on a SCSI hard
> disk.  

This should work, too.  The only problem is that the SCSI cables get
flakey if you move them around too often.

> BTW:  This reminds me that I forgot to include PC-Minix Version 1.3
> in the in the "Build List" I published earlier.  As I understand, Dave/Bruce 
> will be distributing pc532-Minix as difference files relative to PC-Minix 
> Version 1.3 do to copyright restrictions.

I think we can distribute the actual source rather than diff's, assuming
people have legal copies of PC or ST Minix.

Bruce Culbertson

From owner-pc532%daver@mips.com Tue Feb  6 19:06:15 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
To: pc532@daver.uu.NET
Subject: Those last few parts...
Clarity-Index: null
Threat-Level: none
Quote-Of-The-Moment: 's/./&&/g' Tom sed expansively.
Quote-Of-The-Moment: Termoter messers temperrs.  -- A 4th grader
What-Was-Meant: A thermometer measures temperature.
Date: Tue, 06 Feb 90 14:31:26 CST
From: Jon Loeliger <loeliger@convex.com>

Hi!

I got my first set of parts from Sun State yesterday!  I expect the
rest to trickle in in the next couple of days or so...  But, I've
got this problem still...

Remember these guys?

      31       1	74AS646 - AS TTL OCTAL REGISTERED/TRANS WITH TS OUT
      33       1	74ALS1034A - ALS TTL HEX NON-INVERTING DRIVER
      34       2        74AS1034A - AS TTL HEX NON-INVERTING DRIVER

I managed to find a source (Newark) for the '646 and the 'ALS1034, but
not the 'AS1034.  They will get new ones at the beginning of March,
which, isn't *really* good enough...  Also, the 'ALS1034 only comes in
lots of 25 at .63 each.  Anyone need/want to split an order of 'ALS1034s?

Can someone either a) point me to a source for the 'AS1034, b) tell me
what the critical timing/current factors are for the 'AS1034 that I might
find a substitute, or c) sell me two of theirs?

Thanks,
jdl
------------------------------------------------------------------------------
Jon Loeliger			    | loeliger@convex.com
Convex Computer Corporation	    | I'm the thirteenth at your table,
3000 Waterview, Richardson TX 75080 | I'm the uninvited guest.  - Marillion

From owner-pc532%daver@mips.com Wed Feb  7 01:08:20 1990
Flags: 000000000001
Reply-To: pc532@daver.UU.NET
From: george@wombat (George Scolaro)
Date: Tue, 6 Feb 90 21:34:11 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.UU.NET
Subject: Re: Those last few parts...

[In the message entitled "Those last few parts..." on Feb  6, 14:31, Jon Loeliger writes:]
> 
> Can someone either a) point me to a source for the 'AS1034, b) tell me
> what the critical timing/current factors are for the 'AS1034 that I might
> find a substitute, or c) sell me two of theirs?

No substitute for the as1034. It has to be what it is. But, if it helps the
volume you can use an as1034 in place of the als1034, i.e. use 2 per board.
Arrow and Active both list the as1034's in their respective catalogues.
Approx $1/each, of course they probably have minimums too.


regards,

-- 
George Scolaro
george@wombat
(try {pyramid|sun|vsi1|killer} !daver!wombat!george) [37 20 51 N / 122 03 07 W]

From owner-pc532%daver@mips.com Wed Feb  7 12:55:41 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
From: dlr@daver.UU.NET (Dave Rand)
Date: Wed, 7 Feb 90 09:50:03 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.uu.net
Subject: PC532 Mailing List

The following is the current (as of 9:48 this morning) pc532 distribution
list. Note that several of the names are really aliases for further 
distribution. As requested, I have removed the names of the people that
prefer not to have their net address shown.

BTW - if you would like your net address changed, please send your request
to pc532-request@daver.uu.net.


dlr@daver.uu.net
george@wombat.uucp
uunet!nac.no!jensen%hsr.uninett		# Tarjei T. Jensen
mips!pawl.rpi.edu!night			# Trip Martin
culberts@hplabs.hp.com			# Bruce Culbertson
mips!fesk.seri.gov!sverre		# Sverre Froyen
kls@ditka.UUCP				# Karl Swartz
mips!mac.dartmouth.edu!steve.ligett	# Steve Ligett
pc532-local@think.com			# David Taylor (taylor@think.com)
des@dtg.nsc.com				# Desmond Young
chaim@nsc.nsc.com			# Chaim Bendalyk
mips!csvax.caltech.edu!andy		# Andy Fyfe
katcher@netcom				# Jeff Katcher
asgard@omni.com				# Jay Stoner
sun!carroll1.cc.edu!dnewton		# Dave Newton
uunet!tarpit!manatee!johnc		# John Connin
marks@mgse				# 
texbell!moray!siswat!buck		# A. Lester Buck
john@starfire.MN.ORG			# John Lind
mips!walt.cc.utexas.edu!olorin		# Dave Weinstein
pyramid!unify!mason			# Mark Mason
mips!gatech.edu!mm!ken			# Ken Seefried iii
sun!csd4.csd.uwm.edu!astieber		# Anthony J Stieber
kenyee@s49.prime.com			# Ken Yee?
mips!cs.strath.ac.uk!raymond		# Raymond?
ian@sibyl.eleceng.ua.oz.au		# Ian
neil@wcc.oz.au				# Neil
pc532%eyrie@labtam.oz.au		# David Burren (Athos)
rdp@bruce.cs.monash.oz.au		# Ronald Pose
msh@otc.oz.au				# Michael Homsey
hwajin@wrs.com				# Hwa Jin Bae
uunet!LADC.Bull.Com!Mark-Geisert/PC532	# Mark Geisert
ericbr@microsoft			# Eric Brown
mips!bu-it.bu.edu!pc532-dist		# budd@bu.edu (Phil Budne)
rflukes@uofmcc.BITNET			# Lukes
uunet!skatter.USask.ca!neil		# Neil
pc32532@hut.fi				# Jukka Virtanen
uunet!kontu.utu.fi!avirtanen		# Antti-Pekka
uunet!encore.encore.com!jcallen		# Jerry Callen
uunet!rsiatl!stiatl!meo			# Miles O'Neal
uunet!ssi!mtd				# Mike Daly
mips!dgp.toronto.edu!pavel		# Pavel Rozalski
glowell@hpda.hp.com			# Gary Lowell
uunet!isy.liu.se!pc532-se		# Distribution for Sweden
pc532-dist@quick.com			# Spencer Garrett srg@quick.com
mips!kithrup.com!sef			# Sean Fagan
nk@sybase.com				# Nicolai Kosche
attctc!puzzle!pc532-l			# Bob Izenberg (bei)
mips!ms.uky.edu!jpenny			# J. Penny
mips!grad1.cis.upenn.edu!iyengar	# Anand 
mips!zeus.unl.edu!conslt16		# Thomas Davis
mips!jacobs.cs.orst.edu!go		# Gary Oliver
ritchie@hp-lsd.hp.com			# Dave Ritchie
loeliger@convex.com			# Jon Loeliger
uunet!zycor!bill			# Bill Mahoney
s871943@minyos.xx.rmit.oz.au		# Simon Burge
mips!cs.AthabascaU.CA!rwa		# Ross Alexander
1gtlmkf@calstate.bitnet			# 
sun!csri.toronto.edu!tmsoft!mason	# Dave Mason
sun!csri.toronto.edu!hcr!hcrvx1!ron	# Ron
RGREENEB@RICEVM1.RICE.EDU		# Robert D. Greene
pyramid!pcsbst!meepmeep.pcs.com!jkh	# Jordan Hubbard
sun!cunixf.cc.columbia.edu!jbaltz	# Jerry Altzman
eyal@ucisae.isae.cancol.oz.au		# Eyal Lebedinsky
mips!inf.ethz.ch!Pfister		# Cuao Pfister
rmf@bpdsun1				# Rob Finley
rzh@lll-lcc.llnl.gov			# Roger Hanscom
pc532@taux01.nsc.com			#Amos Shapir (amos) gateway
mips!ricevm1.rice.edu!jjeff00		# Jeff Jeffress
uunet!equi.com!john			# John Ackley
uunet!ast.UUCP!strat			# Scott Stratmoen
mips!mace.cc.purdue.edu!ahp		# Phil Trice
sun!ics.com!bert			# Bert
#uunet!bnrgate!wilde!robe		# Rob Enns
info-pc532@cheers			# Greg Onufer
pc532@col.hp.com			# (bdale) Bdale Garbee
rjk@sequent				# Robert Kelley
rjohnson@mpr.ca				# Robbin Johnson
vw26!vw25.chips.com!gs			# George B. Scolaro
vw26!bpan				# Benjamin Pan
pyramid!pcsbst!meepmeep.pcs.com!khe	#
pyramid!pcsbst!neptun.pcs.com!gj	#
bobm@convex.com				# Bob Miller
arthur@cs.warwick.ac.uk			# John Vaudin
deraadt@cpsc.UCalgary.ca		# Theo Deraadt
mips!xcssun.Berkeley.EDU!dean		# Drew Dean
jthomp@sun.com				# J. Thomp
mips!shs.ohio-state.edu!jackson		# Michel Jackson

-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr%daver@uunet.uu.net

From owner-pc532%daver@mips.com Wed Feb  7 19:56:59 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
To: pc532@daver.UU.NET
Cc: pc532@daver.UU.NET
Subject: Re: Boot procedure. 
Date: Wed, 07 Feb 90 19:00:05 EST
From: David Taylor <taylor%think%ames%uunet@daver>

<From: mips!sibyl.eleceng.ua.oz.au!ian@ames.UUCP
<Date: Wed, 7 Feb 1990 09:16:02 +1100
<
<Ken Seefried iii writes:
< > On Feb 4,  3:11am, gatech!sibyl.eleceng.ua.oz.au!ian wrote:
< > } .... GDB supports remote debugging over a serial line

< > Last I checked, this code was very experimental and worked only on 
< > 68000s.  I dunno how hard it would be to get going for us...

<I don't see anything 68k specific about it.

The support within gdb itself is processor independent.  There is also a
68k specific shar file called remote-sa.m68k.shar that is distributed
with it.  Someone would need to write one for the '532.

Another option is the standalone (kernel) version of gdb, called kdb.  I
don't know if it's ever been used.  According to the Projects file in
the gdb distribution, pace@wheaties.ai.mit.edu has built a standalone
gdb for the i386.  When I asked Jim Kingdon (kingdon@ai.mit.edu) about
it (he's the current maintainer of gdb), he said that he didn't know
what the Projects file was referring to.

I tried building the kdb target in the gdb makefile and discovered that
it wouldn't link -- there are a number of undefined symbols and also
some multiply defined symbols.

I've sent mail to pace@wheaties.ai.mit.edu asking for information about
the i386 version -- figuring that some of the same changes might be
useful for the '532.  So far I haven't received a reply.

The processor/kernel specific part of kdb is specified by the following
macros.  Looking at these, it looks like they've never been converted to
the '532 -- they look like the vax ones.  Also, these would need to be
converted to be gcc compatible.  And kdb and the kernel (Minix, MACH,
whatever) would need some way of communicating -- in particular kdb
needs some way of telling the kernel to not use the memory occupied by
kdb.

The remote serial line stuff is smaller and probably easier to do.  It,
however, is also less useful -- you need to have another machine.

/* Interface definitions for kernel debugger KDB.  */

/* Map machine fault codes into signal numbers.
   First subtract 0, divide by 4, then index in a table.
   Faults for which the entry in this table is 0
   are not handled by KDB; the program's own trap handler
   gets to handle then.  */

#define FAULT_CODE_ORIGIN 0
#define FAULT_CODE_UNITS 4
#define FAULT_TABLE \
{ 0, SIGKILL, SIGSEGV, 0, 0, 0, 0, 0, \
  0, 0, SIGTRAP, SIGTRAP, 0, 0, 0, 0, \
  0, 0, 0, 0, 0, 0, 0, 0}

/* Start running with a stack stretching from BEG to END.
   BEG and END should be symbols meaningful to the assembler.
   This is used only for kdb.  */

#define INIT_STACK(beg, end)  \
{ asm (".globl end");         \
  asm ("movl $ end, sp");      \
  asm ("clrl fp"); }

/* Push the frame pointer register on the stack.  */
#define PUSH_FRAME_PTR        \
  asm ("pushl fp");

/* Copy the top-of-stack to the frame pointer register.  */
#define POP_FRAME_PTR  \
  asm ("movl (sp), fp");

/* After KDB is entered by a fault, push all registers
   that GDB thinks about (all NUM_REGS of them),
   so that they appear in order of ascending GDB register number.
   The fault code will be on the stack beyond the last register.  */

#define PUSH_REGISTERS        \
{ asm ("pushl 8(sp)");        \
  asm ("pushl 8(sp)");        \
  asm ("pushal 0x14(sp)");    \
  asm ("pushr $037777"); }

/* Assuming the registers (including processor status) have been
   pushed on the stack in order of ascending GDB register number,
   restore them and return to the address in the saved PC register.  */

#define POP_REGISTERS      \
{ asm ("popr $037777");    \
  asm ("subl2 $8,(sp)");   \
  asm ("movl (sp),sp");    \
  asm ("rei"); }

David

From owner-pc532%daver@mips.com Wed Feb  7 21:09:35 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
X-Mailer: Mail User's Shell (6.4 2/14/89)
To: pc532@daver.uu.net
Subject: Minix versions
Date: 7 Feb 90 21:12:42 GMT (Wed)
From: ken%mm%gatech@ames.arc.nasa.gov (Ken Seefried iii)

When would be the ETA on a Minix/532 equivalent to v.1.5?  I'd
like to use Ken Staileys' symbolic link package, which requires a
v.1.5 kernal.  Included is the info he sent me.  An OS just ain't
an OS without sym-links...;')

Thanks...

*------------------------------* snip *--------------------------*

Date: Wed, 7 Feb 90 00:46:53 EST
From: gatech!iris613.gsfc.nasa.gov!stailey (Ken Stailey)
To: uunet.uu.net!gatech!mm!ken
Subject: symbolic links

This is the beta version of symbolic links.  It was started
on Sat Feb 3, 1990 and released on the Sat Feb 7, 1990.

Arrange the files accordingly:

	fs/link.c
	fs/open.c
	fs/inode.c
	fs/path.c
	fs/stadir.c
	fs/glo.h
	fs/table.c

	src/lib/other/symlink.c
	src/lib/other/readlink.c
	src/lib/other/lstat.c
	src/lib/other/perror.c

	<minix/const.h>
	<minix/callnr.h>
	<errno.h>

	commands/ls.c
	commands/ln.c
	commands/fsck.c
	commands/rm.c

Apply all the patches to ST 1.5.0 (or hack into PC 1.5.0)
If you have any problems with cdif files ask for whole ones.
Rebuild the fs & make the new kernel & reboot.
Update libc.a with to include the new functions.
Compile and test the new tools.
It is recommend that you test symbolic links on the ram disk first.
Do not run any of the commands without the new kernel.


-- 
       Ken Seefried iii             ...!<anywhere>!uunet!gatech!mm!ken
         MetaMedia, Inc.              ken%mm.uucp@gatech.edu 
           Atlanta, Georgia, USA        obquote: "I feel...like a god..."
    
                         "Release the weasels..."

From owner-pc532%daver@mips.com Thu Feb  8 18:00:02 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Thu, 8 Feb 90 14:52 PST
From: dlr@daver.uu.net (Dave Rand)
To: pc532@daver.uu.net
Subject: they're heeeere...

Well, I just got back a few minutes ago, and I now have in my very hands
the CPU/FPU and ICU that you have all been waiting for! Unless something
else comes up, we will start organizing the shipping this weekend. 

Regretfully, I was unable to thank the appropriate parties in person,
but I'm sure that all of you will join with me in thanking National
Semiconductor for this excellent deal.

Bruce Culbertson, George and I talked a couple of nights ago regarding
the distribution of Minix. The best way that we came up with is for those
that want a complete 532 MINIX distribution (when it is available), please
send in one of your original Prentice/Hall disks with the PC (or other)
version of MINIX on it. This will 'prove' that you have purchased a
copy, and protect us legally. For those in other countries, perhaps
one of you could do this, then make authorized copies in the same
manner (each person must show proof of ownership).

For those of you that were anticipating us getting more chips, looks
like it will not be possible at this price. I have a quote for
NS32GX32-20's of $110 in small lots, though. Let me know if you
are interested in this.

Dave Rand / George Scolaro
+1 408 434-0600 X4555 work
+1 408 733-4125 home

From owner-pc532%daver@mips.com Mon Feb 12 12:51:46 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Mon, 12 Feb 90 10:53:39 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: 8473s, anyone?

I just bought 10 DP8473Ns. All but 3 are spoken for; if anyone wants any
or all of those 3 for $14.07 each (plus a buck for shipping) send me mail.

-- Jerry Callen
   jcallen@encore.com
   (508) 460-0500 (work)
   (617) 876-5330 (home)

From owner-pc532%daver@mips.com Tue Feb 13 11:42:26 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
From: bobm%convex%uunet@daver (Bob Miller)
X-Quote-Of-The: OSI: Same day service in a nanosecond world -- Van Jacobsen
X-Gnat-State: Grummet
To: pc532@daver
Subject: Chock Full o' Questions
Date: Tue, 13 Feb 90 01:10:53 CST


Hi.  Let me introduce myself.  I'm an OS hacker by trade, working at
Convex Computer.  My background is Berkeley Unix almost exclusively.
I don't have a 532 but am looking forward to helping Loeliger bring
his up.  Then when I have some spare change...  We're very interested
in Mach, and will probably try our own port as soon as it's legal.  Up
until this weekend I knew practically nothing about the 32000 series.
I just got the 32532 datasheet and read through it.  I have never
owned an IBM PC and I'm proud of it.

The rest of this message is a long list of questions, both about the
PC532 hardware and about Bruce's minix port.  You'll see that most of
them are asked from the point of view of someone who's thinking about
porting an OS.

					K<bob>

"Computers are my forte."		Bob Miller/bobm@convex.com

-------------------------- 32532 questions -----------------------------------

I don't see how SP0 (interrupt SP) is initialized.  Can you set it
using LPRD?  Is it initialized on every interrupt?  From where?

Why are the CINV instruction (cache invalidate) and the CFG.IC and
CFG.DC bits (enable instruction/data cache) privileged?  Is there some
way a user process would be able to crash the machine by playing with the
cache?

Does the '532 have some sort of software interrupt, analogous to the
VAX's AST?

I couldn't find any explanation of the RDVAL and WTVAL instructions.
What do they do?  Or where are they documented?

What about modules?  Are they used much?  Is CXP much slower than
JSR?  Which do most C compilers use?

What's the fastest way to do bcopy?  MOVMD?  MOVSD?  Loop of MOVD's?

------------------------------------------------------------------------------
-------------------------- pc532 questions -----------------------------------

I'd guess it's necessary to use CINV to invalidate the instruction
cache whenever a text segment is written to (exec or ptrace).  Is it
ever necessary to invalidate the data cache?  I think it isn't,
because all accesses to memory come from the CPU and the CPU always
goes through the data cache.

I'd guess that you have to use vectored interrupts because of the
presence of the ICU chip.  Is that right?

------------------------------------------------------------------------------
-------------------------- minix questions -----------------------------------

Does the Minix kernel use virtual or physical addressing?  I.e., does
it set the TS bit in the Memory Mgt Control Register?

If it uses virtual addressing, does it use dual space or single?  (the
DS bit in the MCR)

Does Minix use Direct Exception Mode (interrupt vectors without module
switches)?

Does Minix use modules in the kernel?

Do the Minix runtimes use modules in user code?

Does a bus error ever occur during normal operation?  Is there any way
a user process could cause a bus error?  (I think not.)

Does Minix use the debug registers?

Any chance you'd post or mail out the console driver?  You ought to be
able to do that legally.  For that matter, Dave, how about posting the
whole EPROM source?

------------------------------------------------------------------------------

Thanks a lot!

From owner-pc532%daver@mips.com Tue Feb 13 13:28:24 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
From: dlr@daver.UU.NET (Dave Rand)
Date: Tue, 13 Feb 90 09:47:39 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.UU.NET
Subject: Re: Chock Full o' Questions

[In the message entitled "Chock Full o' Questions" on Feb 13,  1:10, Bob Miller writes:]
> The rest of this message is a long list of questions, both about the
> PC532 hardware and about Bruce's minix port.  You'll see that most of
> them are asked from the point of view of someone who's thinking about
> porting an OS.
I'll do my best...

> I don't see how SP0 (interrupt SP) is initialized.  Can you set it
> using LPRD?  Is it initialized on every interrupt?  From where?
The two stacks are initialized by the LPRD instruction, followed by
a BISPSRW setting the 'S' bit, then another LPRD. When in user mode,
the interrupt stack is selected automatically when an interrupt is
taken. You do not initialize it on every interrupt. Typically,
SP0 is initialized once, and SP1 is changed on each context switch.

> Why are the CINV instruction (cache invalidate) and the CFG.IC and
> CFG.DC bits (enable instruction/data cache) privileged?  Is there some
> way a user process would be able to crash the machine by playing with the
> cache?
Not that I know of. It does, however, keep the user instructions
consistant across the entire family (earlier processors did not have
on-board cache).

> Does the '532 have some sort of software interrupt, analogous to the
> VAX's AST?
Sort of. It has SVC's.

> I couldn't find any explanation of the RDVAL and WTVAL instructions.
> What do they do?  Or where are they documented?
See the _Series 32000 Programmers Reference Manual_ (Prentice-Hall). They
ensure that a given address has the "appropriate" permissions set for the
given access (Read or Write).

> What about modules?  Are they used much?  Is CXP much slower than
> JSR?  Which do most C compilers use?
CXP is slower than JSR/BSR. JSR/BSR is used by the current crop of C
compilers. Modules do not have to be used at all, due to the direct
exception mode now offered. It was a good idea, but the cost of
double-indirection at run time to avoid link-time CPU is not a
good trade.

> What's the fastest way to do bcopy?  MOVMD?  MOVSD?  Loop of MOVD's?
MOVSD or MOVD's unrolled are equally fast. They run at two clocks per
double on the PC532 (1 wait on burst, no wait on write, in-page access).
The set-up time is the only difference, and it is small (less than 20
clocks, as I recall).

> 
> I'd guess it's necessary to use CINV to invalidate the instruction
> cache whenever a text segment is written to (exec or ptrace).  Is it
> ever necessary to invalidate the data cache?  I think it isn't,
> because all accesses to memory come from the CPU and the CPU always
> goes through the data cache.
True. You would only invalidate if you had external hardware that could
change the data space, like a DMA controller.

> I'd guess that you have to use vectored interrupts because of the
> presence of the ICU chip.  Is that right?
Yes. While it is not required, it is a good idea.

> Does the Minix kernel use virtual or physical addressing?  I.e., does
> it set the TS bit in the Memory Mgt Control Register?
> 
> If it uses virtual addressing, does it use dual space or single?  (the
> DS bit in the MCR)
As I understand it (you would be better off asking Bruce this question),
each user process runs virtual, and the kernel runs physical.


> Does Minix use Direct Exception Mode (interrupt vectors without module
> switches)?
Not currently.


> Does Minix use modules in the kernel?
As few as possible.

> Do the Minix runtimes use modules in user code?
Yes.

> Does a bus error ever occur during normal operation?  Is there any way
> a user process could cause a bus error?  (I think not.)
No. Bus errors are not possible on the pc532.

> Does Minix use the debug registers?
Not that I know of.

> Any chance you'd post or mail out the console driver?  You ought to be
> able to do that legally.  For that matter, Dave, how about posting the
> whole EPROM source?

It is copyright. I am using MON16. I can't get a straight answer as to
if I can mail the source of it out. The console driver, while modified,
is still based on the Prentice-Hall version. Don't ask me to violate
copyrights - I won't do it. I can mail diffs.

I am in the midst of negotiations for SYSV right now (I have a binary
redistribution license already), so I want to be very careful at the
moment.


-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr%daver@uunet.uu.net

From owner-pc532%daver@mips.com Tue Feb 13 14:04:12 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
X-Mailer: Mail User's Shell (6.4 2/14/89)
To: pc532@daver.UU.NET
Subject: Re: Boot procedure.
Date: 13 Feb 90 16:29:09 GMT (Tue)
From: ken%mm@gatech.edu (Ken Seefried iii)

On Feb 10, 10:07am, gatech!sibyl.eleceng.ua.oz.au!ian wrote:
} 
} I think the kdb stuff would be a fair bit of work. There remote serial line
} stuff seems pretty simple. There is no remote-sa.m68k.shar in my (gdb 3.1)
} distribution. There is a remote.c and I can seen nothing 68k specific about
} it. it is specific to whatever ROM monitor is running at the remote end
} but I suggest we make the monitor conform with gdb as far as examining/
} changing memory etc is concerned.
} 

There is in my version (gdb 3.5).


-- 
       Ken Seefried iii             ...!<anywhere>!uunet!gatech!mm!ken
         MetaMedia, Inc.              ken%mm.uucp@gatech.edu 
           Atlanta, Georgia, USA        obquote: "I feel...like a god..."
    
                         "Release the weasels..."

From owner-pc532%daver@mips.com Wed Feb 14 13:18:43 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Wed, 14 Feb 90 10:52:42 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.uu.NET
Subject: F vs. AS

I'm currently in a digital electronics lab course, and this week after class
I was talking to the instructor about the pc532. He was REALLY concerned about
all of the AS family logic on the board; his claim is that AS is much more
likely to cause ground bounce or even oscillate than F, and (as George has
pointed out) isn't really much faster. He now avoids AS unless the extra
speed is absolutely essential.

George, could you post a definitive list of which AS parts may be replaced
by F and which MUST be AS? Or is this guy totally wacko?

-- Jerry "hey, I bounce around enough as it is" Callen
   jcallen@encore.com
   (508) 460-0500 (work)
   (617) 876-5330 (home)

From owner-pc532%daver@mips.com Wed Feb 14 14:35:35 1990
Flags: 000000000000
Reply-To: pc532@daver.UU.NET
Date: Wed, 14 Feb 90 11:29:02 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver.UU.NET
Subject: Re: F vs. AS

[In the message entitled "F vs. AS" on Feb 14, 10:52, Jerry Callen writes:]
> 
> I was talking to the instructor about the pc532. He was REALLY concerned about
> all of the AS family logic on the board; his claim is that AS is much more
> likely to cause ground bounce or even oscillate than F, and (as George has

Oscillate? Not likely! Actually, F has its own troubles, it is a more static
sensitive product family. i.e. static will destroy F logic, AS (ALS etc) is
a hardier family.

> pointed out) isn't really much faster. He now avoids AS unless the extra
> speed is absolutely essential.

And then what? If the speed is essential does he then ignore all the problems
he is worried about?
 
> George, could you post a definitive list of which AS parts may be replaced
> by F and which MUST be AS? Or is this guy totally wacko?

Well, maybe not totally wacko, but certainly a bit over board. Sure, on
a poorly designed board (ie 2 layer) AS logic will generate nasty power
supply transients, but on a well filtered (notice the pc532 has lots and lots
of bypass caps - good quality monolithics) multi-layer board the power supply
noise will be very low.

I have already stated that every nanosecond on the board counts, just use the
parts that were in the list. If you want you can 'probably' get away with
F logic everywhere you can (except for things like the 74as1004/34 & 832's,
but I'll leave it as an exercise (for the reader) to figure what the worst
case timing violations will be...

The thing to note is that most people have particular likes and dislikes, I
know a few people that are paranoid about AC logic (which really bounces!)
because of previous problems. The real point is that bad PCB layout usually
is the real cause of bad experiences, I have seen clock lines bouncing more
than 2V (with a good scope) over and under the power rails - the reason:
high current drivers and light loads (CMOS high current driver with >12
inches of trace going to the input of a CMOS device). If caution had been
used in the layout, the source and destination of the clock should have been
close (i.e. put the 2 chips next to each other) and if necessary terminate
the clock line. The problem here was the schematic was done, sent overseas
for CAD layout (where all electrical properties of the design were ignored)
and then the board was fabbed. Needless to say the boards worked anyway, of
course long term reliability was questionable.

best regards,

-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From owner-pc532%daver@mips.com Fri Feb 16 15:55:34 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
Date: Fri, 16 Feb 90 10:13:46 pst
From: Bruce Culbertson <culberts@hplwbc.hpl.hp.com>
To: pc532@bungi.com
Subject: Re: Chock Full of Questions

Howdy gang,

Pc532 mail addressed to me was plugged up somewhere for several
days -- too many birds sitting on the phone wires, I think.

These questions came from several people...

> What news and mail software run on Minix?

Someone has this kind of stuff running and has posted it to
comp.os.minix.  I think it is at least partly based on something
called UUPC.  It has not (to my knowledge) been made part of the
official Minix release and I have not looked at it.

> I don't see how SP0 (interrupt SP) is initialized.  Can you set it
> using LPRD?  Is it initialized on every interrupt?  From where?

On the 32016, setting sp0 and sp1 was a minor pain.  You can
"lprd sp, xxx".  This loads the currently selected stack pointer
register, based on the processor status register S flag.  Thus,
for the supervisor to restore the user stack pointer, three
instructions were required: bispsrw h'200; lprd sp, xxx; bicpsrw
h'200.  On the '532, you can now "lprd usp, xxx", allowing the
previous example to be replaced with one instruction.

> Why are the CINV instruction (cache invalidate) and the CFG.IC and
> CFG.DC bits (enable instruction/data cache) privileged?  Is there some
> way a user process would be able to crash the machine by playing with the
> cache?

On a big time share machine, you would not want one user to be able
to turn off the cache for everyone.  I think that's the rationale.

> I couldn't find any explanation of the RDVAL and WRVAL instructions.
> What do they do?

These are read and write validate.  Without reading or writing or
causing traps, they tell the user (via the F bit in the psr) if
an address is readable or writable.

> I'd guess it's necessary to use CINV to invalidate the instruction
> cache whenever a text segment is written to (exec or ptrace).  Is it
> ever necessary to invalidate the data cache?  I think it isn't,
> because all accesses to memory come from the CPU and the CPU always
> goes through the data cache.

This is necessary if you have multiple bus masters, e.g. CPU and
DMA, which are not adherring to the cache coherence protocol.
Probably not a problem for us.

> Does the Minix kernel use virtual or physical addressing?

The kernel runs in physical space and the users run in virtual space.

> Does Minix use Direct Exception Mode (interrupt vectors without module
> switches)?

Minix currently runs only on the 32016, which does not have direct
exception mode.  I think it would be nice to use direct exception
mode on the 32532 since it would be faster and simpler.

> Does Minix use modules in the kernel?

On the 32016, Minix uses them as little as possible.  This means they
are used for interrupts and traps, including context switching.
Perhaps we will have no modules on the 532 Minix.  Modules and
external addressing are extremely slow.

> Do the Minix runtimes use modules in user code?

Again, as little as possible.  Each user process has a one entry
module table so that SVC (supervisor call) will work.  This will
no longer be necessary if we use direct exception mode on the '532.

> Does Minix use the debug registers?

No, they are hard to work into the usual Unix semantics.  My monitor
lets you use them, however, so you can use them to debug Minix.

----------------------------------------------------

I am currently porting my monitor to the pc532 so we will not
have to depend on Dave's MON16, which (practically) requires
an ICM3216 on the other end of the serial line.  So far, I have
updated the disassembler for the '532 extensions and made the
monitor aware of the 4k page size.  As soon as I fix the
debugger/code-under-test context switching, it should be ready
to run.  Dave has provided me with uart routines and code to
initialize the DRAM parity.

Once the monitor is in place, Dave and I will attack the Minix532
port.

Bruce Culbertson

From owner-pc532%daver@mips.com Fri Feb 16 19:50:39 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: gdb 3.5 -- m-pc532.h (cross debugger)
Date: Fri, 16 Feb 90 18:51:52 EST
From: David Taylor <taylor@Think.COM>

I've got gdb 3.5 working, at least somewhat, as a cross disassembler for
the pc532.  I haven't tried anything beyond disassembly.

I compiled it on a vax so that I wouldn't have to work about byte order
problems.  The configuration that I used, is:

	dep.c -> default-dep.c (I doubt that this matters for disassembly)
	opcode.h -> ns32k-opcode.h
	param.h -> m-pc532.h (see below)
	pinsn.c -> ns32k-pinsn.c

For m-pc532.h, I took m-merlin.h and edited it.  Here's the diff output.
The diff command was: ``diff -c m-merlin.h m-pc532.h'' where m-merlin.h
is as distributed with gdb 3.5 with no changes whatsoever.

With this configuration and the changes to ns32k-opcode.h and
ns32k-pinsn.c that I sent in mail just minutes ago, I've been able to
use gdb to disassemble '532 instructions.  But, not yet having a 32k box
of any flavor, I haven't tried to do anything more.

David

*** m-merlin.h	Tue Jan 30 15:29:57 1990
--- m-pc532.h	Sat Jan 20 04:03:00 1990
***************
*** 1,4 ****
! /* Definitions to make GDB run on a merlin under utek 2.1
     Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
  
  This file is part of GDB.
--- 1,5 ----
! /* Definitions to make GDB run on a PC532 -- a 32532 based system
!    (derived from m-merlin.h)
     Copyright (C) 1986, 1987, 1989 Free Software Foundation, Inc.
  
  This file is part of GDB.
***************
*** 21,38 ****
  #define ns16000
  #endif
  
- /* This machine doesn't have the siginterrupt call.  */
- #define NO_SIGINTERRUPT
- 
- /* Under Utek, a ptrace'd process can be the only active process for
-    an executable.  Therefore instead of /bin/sh use gdb-sh (which should
-    just be a copy of /bin/sh which is world readable and writeable).  */
- #define SHELL_FILE "/usr/local/lib/gdb-sh"
- 
  /* Define the bit, byte, and word ordering of the machine.  */
  /* #define BITS_BIG_ENDIAN */
  /* #define BYTES_BIG_ENDIAN */
  /* #define WORDS_BIG_ENDIAN */
  
  # include	<machine/reg.h>
  
--- 22,34 ----
  #define ns16000
  #endif
  
  /* Define the bit, byte, and word ordering of the machine.  */
  /* #define BITS_BIG_ENDIAN */
  /* #define BYTES_BIG_ENDIAN */
  /* #define WORDS_BIG_ENDIAN */
+ 
+ #define NS32532
+ #define NS32381
  
  # include	<machine/reg.h>
  

--
David Taylor
taylor@think.com, ...{ames,bloom-beacon,harvard}!think!taylor

From owner-pc532%daver@mips.com Fri Feb 16 19:53:02 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: gdb 3.5 changes (mostly disassembler)
Date: Fri, 16 Feb 90 18:29:26 EST
From: David Taylor <taylor@Think.COM>

Here are some changes that I've made to gdb -- files ns32k-pinsn.c and
ns32k-opcode.h to get it to better disassemble instructions for the
'532.

GDB would sometimes produce output that, while arguably correct, was not
acceptable as input to GAS.  Othertimes it would produce output that was
just plain wrong.

These changes seem to fix *most* of the problems that GDB had
disassembling ns32k instructions.  And I'm not aware of any new bugs
that they introduce.

If you discover any problems with them, let me know.  Also, if you find
any disassembly problems that they don't fix, let me know about those,
too.

David

RCS file: RCS/ns32k-opcode.h,v
retrieving revision 1.1
diff -c -r1.1 ns32k-opcode.h
*** /tmp/,RCSt1006443	Fri Feb 16 17:15:35 1990
--- ns32k-opcode.h	Sat Feb 10 18:00:55 1990
***************
*** 44,55 ****
   * W : word
   * D : double-word
   * Q : quad-word
   * d : displacement
   * q : quick
   * i : immediate (8 bits)
   * r : register number (3 bits)
   * p : displacement - pc relative addressing
! */
  static struct not
  notstrs[] =
  {
--- 44,66 ----
   * W : word
   * D : double-word
   * Q : quad-word
+  * A : address
   * d : displacement
+  * b : 3rd operand of cmpm or movm instruction
   * q : quick
   * i : immediate (8 bits)
   * r : register number (3 bits)
   * p : displacement - pc relative addressing
!  * O : setcfg instruction options list
!  * C : cinv instruction options list
!  * S : string instruction options list
!  * U : save/enter register list
!  * u : restore/exit register list
!  * M : mmu register
!  * P : cpu register
!  * g : 3rd operand of inss or exts instruction
!  * G : 4th operand of inss or exts instruction
!  */
  static struct not
  notstrs[] =
  {
***************
*** 75,81 ****
    { "addqb",	 7,16,	0x0c,	"2B1q" },
    { "addqw",	 7,16,	0x0d,	"2W1q" },
    { "addqd",	 7,16,	0x0f,	"2D1q" },
!   { "addr",	 6,16,	0x27,	"1D2D" },
    { "adjspb",	11,16,	0x057c,	"1B" },
    { "adjspw",	11,16,	0x057d,	"1W" },
    { "adjspd",	11,16,	0x057f,	"1D" },
--- 86,92 ----
    { "addqb",	 7,16,	0x0c,	"2B1q" },
    { "addqw",	 7,16,	0x0d,	"2W1q" },
    { "addqd",	 7,16,	0x0f,	"2D1q" },
!   { "addr",	 6,16,	0x27,	"1A2D" },
    { "adjspb",	11,16,	0x057c,	"1B" },
    { "adjspw",	11,16,	0x057d,	"1W" },
    { "adjspd",	11,16,	0x057f,	"1D" },
***************
*** 112,141 ****
    { "caseb",	11,16,	0x77c,	"1B" },
    { "casew",	11,16,	0x77d,	"1W" },
    { "cased",	11,16,	0x77f,	"1D" },
!   { "cbitb",	14,24,	0x084e,	"1B2D" },
!   { "cbitw",	14,24,	0x094e,	"1W2D" },
!   { "cbitd",	14,24,	0x0b4e,	"1D2D" },
!   { "cbitib",	14,24,	0x0c4e,	"1B2D" },
!   { "cbitiw",	14,24,	0x0d4e,	"1W2D" },
!   { "cbitid",	14,24,	0x0f4e,	"1D2D" },
    { "checkb",	11,24,	0x0ee,	"2A3B1r" },
!   { "checkw",	11,24,	0x1ee,	"2A3B1r" },
    { "checkd",	11,24,	0x3ee,	"2A3D1r" },
    { "cmpf",	14,24,	0x09be,	"1F2F" },
    { "cmpl",	14,24,	0x08be,	"1L2L" },
    { "cmpb",	 6,16,	0x04,	"1B2B" },
    { "cmpw",	 6,16,	0x05,	"1W2W" },
    { "cmpd",	 6,16,	0x07,	"1D2D" },
!   { "cmpmb",	14,24,	0x04ce,	"1D2D3d" },
!   { "cmpmw",	14,24,	0x05ce,	"1D2D3d" },
!   { "cmpmd",	14,24,	0x07ce,	"1D2D3d" },
    { "cmpqb",	 7,16,	0x1c,	"2B1q" },
    { "cmpqw",	 7,16,	0x1d,	"2W1q" },
    { "cmpqd",	 7,16,	0x1f,	"2D1q" },
!   { "cmpsb",	16,16,	0x040e,	"1i" },
!   { "cmpsw",	16,16,	0x050e,	"1i" },
!   { "cmpsd",	16,16,	0x070e,	"1i" },
!   { "cmpst",	16,16,	0x840e,	"1i" },
    { "comb",	14,24,	0x344e,	"1B2B" },
    { "comw",	14,24,	0x354e,	"1W2W" },
    { "comd",	14,24,	0x374e,	"1D2D" },
--- 123,153 ----
    { "caseb",	11,16,	0x77c,	"1B" },
    { "casew",	11,16,	0x77d,	"1W" },
    { "cased",	11,16,	0x77f,	"1D" },
!   { "cbitb",	14,24,	0x084e,	"1B2A" },
!   { "cbitw",	14,24,	0x094e,	"1W2A" },
!   { "cbitd",	14,24,	0x0b4e,	"1D2A" },
!   { "cbitib",	14,24,	0x0c4e,	"1B2A" },
!   { "cbitiw",	14,24,	0x0d4e,	"1W2A" },
!   { "cbitid",	14,24,	0x0f4e,	"1D2A" },
    { "checkb",	11,24,	0x0ee,	"2A3B1r" },
!   { "checkw",	11,24,	0x1ee,	"2A3W1r" },
    { "checkd",	11,24,	0x3ee,	"2A3D1r" },
+   { "cinv",	15,24,	0x271e,	"2D1C" },
    { "cmpf",	14,24,	0x09be,	"1F2F" },
    { "cmpl",	14,24,	0x08be,	"1L2L" },
    { "cmpb",	 6,16,	0x04,	"1B2B" },
    { "cmpw",	 6,16,	0x05,	"1W2W" },
    { "cmpd",	 6,16,	0x07,	"1D2D" },
!   { "cmpmb",	14,24,	0x04ce,	"1A2A3b" },
!   { "cmpmw",	14,24,	0x05ce,	"1A2A3b" },
!   { "cmpmd",	14,24,	0x07ce,	"1A2A3b" },
    { "cmpqb",	 7,16,	0x1c,	"2B1q" },
    { "cmpqw",	 7,16,	0x1d,	"2W1q" },
    { "cmpqd",	 7,16,	0x1f,	"2D1q" },
!   { "cmpsb",	16,16,	0x040e,	"1S" },
!   { "cmpsw",	16,16,	0x050e,	"1S" },
!   { "cmpsd",	16,16,	0x070e,	"1S" },
!   { "cmpst",	16,16,	0x840e,	"1S" },
    { "comb",	14,24,	0x344e,	"1B2B" },
    { "comw",	14,24,	0x354e,	"1W2W" },
    { "comd",	14,24,	0x374e,	"1D2D" },
***************
*** 143,150 ****
    { "cxp",	 8,8,	0x22,	"1p" },
    { "cxpd",	11,16,	0x07f,	"1D" },
    { "deib",	14,24,	0x2cce,	"1B2W" },
!   { "deiw",	14,24,	0x2cce,	"1W2D" },
!   { "deid",	14,24,	0x2cce,	"1D2Q" },
    { "dia",	 8,8,	0xc2,	"" },
    { "divf",	14,24,	0x21be,	"1F2F" },
    { "divl",	14,24,	0x20be,	"1L2L" },
--- 155,162 ----
    { "cxp",	 8,8,	0x22,	"1p" },
    { "cxpd",	11,16,	0x07f,	"1D" },
    { "deib",	14,24,	0x2cce,	"1B2W" },
!   { "deiw",	14,24,	0x2dce,	"1W2D" },
!   { "deid",	14,24,	0x2fce,	"1D2Q" },
    { "dia",	 8,8,	0xc2,	"" },
    { "divf",	14,24,	0x21be,	"1F2F" },
    { "divl",	14,24,	0x20be,	"1L2L" },
***************
*** 151,164 ****
    { "divb",	14,24,	0x3cce,	"1B2B" },
    { "divw",	14,24,	0x3dce,	"1W2W" },
    { "divd",	14,24,	0x3fce,	"1D2D" },
!   { "enter",	 8,8,	0x82,	"1i2d" },
!   { "exit",	 8,8,	0x92,	"1i" },
!   { "extb",	11,24,	0x02e,	"2D3B1r4d" },
!   { "extw",	11,24,	0x12e,	"2D3W1r4d" },
!   { "extd",	11,24,	0x32e,	"2D3D1r4d" },
!   { "extsb",	14,24,	0x0cce,	"1D2B3i" },
!   { "extsw",	14,24,	0x0dce,	"1D2W3i" },
!   { "extsd",	14,24,	0x0fce,	"1D2D3i" },
    { "ffsb",	14,24,	0x046e,	"1B2B" },
    { "ffsw",	14,24,	0x056e,	"1W2B" },
    { "ffsd",	14,24,	0x076e,	"1D2B" },
--- 163,176 ----
    { "divb",	14,24,	0x3cce,	"1B2B" },
    { "divw",	14,24,	0x3dce,	"1W2W" },
    { "divd",	14,24,	0x3fce,	"1D2D" },
!   { "enter",	 8,8,	0x82,	"1U2d" },
!   { "exit",	 8,8,	0x92,	"1u" },
!   { "extb",	11,24,	0x02e,	"2A3B1r4d" },
!   { "extw",	11,24,	0x12e,	"2A3W1r4d" },
!   { "extd",	11,24,	0x32e,	"2A3D1r4d" },
!   { "extsb",	14,24,	0x0cce,	"1A2B4G3g" },
!   { "extsw",	14,24,	0x0dce,	"1A2W4G3g" },
!   { "extsd",	14,24,	0x0fce,	"1A2D4G3g" },
    { "ffsb",	14,24,	0x046e,	"1B2B" },
    { "ffsw",	14,24,	0x056e,	"1W2B" },
    { "ffsd",	14,24,	0x076e,	"1D2B" },
***************
*** 178,193 ****
    { "insb",	11,24,	0x0ae,	"2B3B1r4d" },
    { "insw",	11,24,	0x1ae,	"2W3W1r4d" },
    { "insd",	11,24,	0x3ae,	"2D3D1r4d" },
!   { "inssb",	14,24,	0x08ce,	"1B2D3i" },
!   { "inssw",	14,24,	0x09ce,	"1W2D3i" },
!   { "inssd",	14,24,	0x0bce,	"1D2D3i" },
    { "jsr",	11,16,	0x67f,	"1A" },
    { "jump",	11,16,	0x27f,	"1A" },
    { "lfsr",	19,24,	0x00f3e,"1D" },
!   { "lmr",	15,24,	0x0b1e,	"2D1q" },
!   { "lprb",	 7,16,	0x6c,	"2B1q" },
!   { "lprw",	 7,16,	0x6d,	"2W1q" },
!   { "lprd",	 7,16,	0x6f,	"2D1q" },
    { "lshb",	14,24,	0x144e,	"1B2B" },
    { "lshw",	14,24,	0x154e,	"1B2W" },
    { "lshd",	14,24,	0x174e,	"1B2D" },
--- 190,205 ----
    { "insb",	11,24,	0x0ae,	"2B3B1r4d" },
    { "insw",	11,24,	0x1ae,	"2W3W1r4d" },
    { "insd",	11,24,	0x3ae,	"2D3D1r4d" },
!   { "inssb",	14,24,	0x08ce,	"1B2A4G3g" },
!   { "inssw",	14,24,	0x09ce,	"1W2A4G3g" },
!   { "inssd",	14,24,	0x0bce,	"1D2A4G3g" },
    { "jsr",	11,16,	0x67f,	"1A" },
    { "jump",	11,16,	0x27f,	"1A" },
    { "lfsr",	19,24,	0x00f3e,"1D" },
!   { "lmr",	15,24,	0x0b1e,	"2D1M" },
!   { "lprb",	 7,16,	0x6c,	"2B1P" },
!   { "lprw",	 7,16,	0x6d,	"2W1P" },
!   { "lprd",	 7,16,	0x6f,	"2D1P" },
    { "lshb",	14,24,	0x144e,	"1B2B" },
    { "lshw",	14,24,	0x154e,	"1B2W" },
    { "lshd",	14,24,	0x174e,	"1B2D" },
***************
*** 210,231 ****
    { "movdl",	14,24,	0x033e,	"1D2L" },
    { "movfl",	14,24,	0x1b3e,	"1F2L" },
    { "movlf",	14,24,	0x163e,	"1L2F" },
!   { "movmb",	14,24,	0x00ce,	"1D2D3d" },
!   { "movmw",	14,24,	0x00de,	"1D2D3d" },
!   { "movmd",	14,24,	0x00fe,	"1D2D3d" },
    { "movqb",	 7,16,	0x5c,	"2B1q" },
    { "movqw",	 7,16,	0x5d,	"2B1q" },
    { "movqd",	 7,16,	0x5f,	"2B1q" },
!   { "movsb",	16,16,	0x000e,	"1i" },
!   { "movsw",	16,16,	0x010e,	"1i" },
!   { "movsd",	16,16,	0x030e,	"1i" },
!   { "movst",	16,16,	0x800e,	"1i" },
!   { "movsub",	14,24,	0x0cae,	"1A1A" },
!   { "movsuw",	14,24,	0x0dae,	"1A1A" },
!   { "movsud",	14,24,	0x0fae,	"1A1A" },
!   { "movusb",	14,24,	0x1cae,	"1A1A" },
!   { "movusw",	14,24,	0x1dae,	"1A1A" },
!   { "movusd",	14,24,	0x1fae,	"1A1A" },
    { "movxbd",	14,24,	0x1cce,	"1B2D" },
    { "movxwd",	14,24,	0x1dce,	"1W2D" },
    { "movxbw",	14,24,	0x10ce,	"1B2W" },
--- 222,243 ----
    { "movdl",	14,24,	0x033e,	"1D2L" },
    { "movfl",	14,24,	0x1b3e,	"1F2L" },
    { "movlf",	14,24,	0x163e,	"1L2F" },
!   { "movmb",	14,24,	0x00ce,	"1A2A3b" },
!   { "movmw",	14,24,	0x01ce,	"1A2A3b" },
!   { "movmd",	14,24,	0x03ce,	"1A2A3b" },
    { "movqb",	 7,16,	0x5c,	"2B1q" },
    { "movqw",	 7,16,	0x5d,	"2B1q" },
    { "movqd",	 7,16,	0x5f,	"2B1q" },
!   { "movsb",	16,16,	0x000e,	"1S" },
!   { "movsw",	16,16,	0x010e,	"1S" },
!   { "movsd",	16,16,	0x030e,	"1S" },
!   { "movst",	16,16,	0x800e,	"1S" },
!   { "movsub",	14,24,	0x0cae,	"1A2A" },
!   { "movsuw",	14,24,	0x0dae,	"1A2A" },
!   { "movsud",	14,24,	0x0fae,	"1A2A" },
!   { "movusb",	14,24,	0x1cae,	"1A2A" },
!   { "movusw",	14,24,	0x1dae,	"1A2A" },
!   { "movusd",	14,24,	0x1fae,	"1A2A" },
    { "movxbd",	14,24,	0x1cce,	"1B2D" },
    { "movxwd",	14,24,	0x1dce,	"1W2D" },
    { "movxbw",	14,24,	0x10ce,	"1B2W" },
***************
*** 246,253 ****
    { "notb",	14,24,	0x244e, "1B2B" },
    { "notw",	14,24,	0x254e, "1W2W" },
    { "notd",	14,24,	0x274e, "1D2D" },
!   { "orb",	 6,16,	0x18,	"1B1B" },
!   { "orw",	 6,16,	0x19,	"1W1W" },
    { "ord",	 6,16,	0x1b,	"1D2D" },
    { "quob",	14,24,	0x30ce,	"1B2B" },
    { "quow",	14,24,	0x31ce,	"1W2W" },
--- 258,265 ----
    { "notb",	14,24,	0x244e, "1B2B" },
    { "notw",	14,24,	0x254e, "1W2W" },
    { "notd",	14,24,	0x274e, "1D2D" },
!   { "orb",	 6,16,	0x18,	"1B2B" },
!   { "orw",	 6,16,	0x19,	"1W2W" },
    { "ord",	 6,16,	0x1b,	"1D2D" },
    { "quob",	14,24,	0x30ce,	"1B2B" },
    { "quow",	14,24,	0x31ce,	"1W2W" },
***************
*** 256,265 ****
    { "remb",	14,24,	0x34ce,	"1B2B" },
    { "remw",	14,24,	0x35ce,	"1W2W" },
    { "remd",	14,24,	0x37ce,	"1D2D" },
!   { "restore",	 8,8,	0x72,	"1i" },
    { "ret",	 8,8,	0x12,	"1d" },
    { "reti",	 8,8,	0x52,	"" },
!   { "rett",	 8,8,	0x42,	"" },
    { "rotb",	14,24,	0x004e,	"1B2B" },
    { "rotw",	14,24,	0x014e,	"1B2W" },
    { "rotd",	14,24,	0x034e,	"1B2D" },
--- 268,277 ----
    { "remb",	14,24,	0x34ce,	"1B2B" },
    { "remw",	14,24,	0x35ce,	"1W2W" },
    { "remd",	14,24,	0x37ce,	"1D2D" },
!   { "restore",	 8,8,	0x72,	"1u" },
    { "ret",	 8,8,	0x12,	"1d" },
    { "reti",	 8,8,	0x52,	"" },
!   { "rett",	 8,8,	0x42,	"1d" },
    { "rotb",	14,24,	0x004e,	"1B2B" },
    { "rotw",	14,24,	0x014e,	"1B2W" },
    { "rotd",	14,24,	0x034e,	"1B2D" },
***************
*** 270,279 ****
    { "roundlw",	14,24,	0x213e,	"1L2W" },
    { "roundld",	14,24,	0x233e,	"1L2D" },
    { "rxp",	 8,8,	0x32,	"1d" },
!   { "sCONDb",	 7,16,	0x3c,	"2B1q" },
!   { "sCONDw",	 7,16,	0x3d,	"2D1q" },
!   { "sCONDd",	 7,16,	0x3f,	"2D1q" },
!   { "save",	 8,8,	0x62,	"1i" },
    { "sbitb",	14,24,	0x184e,	"1B2A" },
    { "sbitw",	14,24,	0x194e,	"1W2A" },
    { "sbitd",	14,24,	0x1b4e,	"1D2A" },
--- 282,336 ----
    { "roundlw",	14,24,	0x213e,	"1L2W" },
    { "roundld",	14,24,	0x233e,	"1L2D" },
    { "rxp",	 8,8,	0x32,	"1d" },
!   { "seqb",	11,16,	0x3c,	"1B" },
!   { "seqw",	11,16,	0x3d,	"1W" },
!   { "seqd",	11,16,	0x3f,	"1D" },
!   { "sneb",	11,16,	0xbc,	"1B" },
!   { "snew",	11,16,	0xbd,	"1W" },
!   { "sned",	11,16,	0xbf,	"1D" },
!   { "scsb",	11,16,	0x13c,	"1B" },
!   { "scsw",	11,16,	0x13d,	"1W" },
!   { "scsd",	11,16,	0x13f,	"1D" },
!   { "sccb",	11,16,	0x1bc,	"1B" },
!   { "sccw",	11,16,	0x1bd,	"1W" },
!   { "sccd",	11,16,	0x1bf,	"1D" },
!   { "shib",	11,16,	0x23c,	"1B" },
!   { "shiw",	11,16,	0x23d,	"1W" },
!   { "shid",	11,16,	0x23f,	"1D" },
!   { "slsb",	11,16,	0x2bc,	"1B" },
!   { "slsw",	11,16,	0x2bd,	"1W" },
!   { "slsd",	11,16,	0x2bf,	"1D" },
!   { "sgtb",	11,16,	0x33c,	"1B" },
!   { "sgtw",	11,16,	0x33d,	"1W" },
!   { "sgtd",	11,16,	0x33f,	"1D" },
!   { "sleb",	11,16,	0x3bc,	"1B" },
!   { "slew",	11,16,	0x3bd,	"1W" },
!   { "sled",	11,16,	0x3bf,	"1D" },
!   { "sfsb",	11,16,	0x43c,	"1B" },
!   { "sfsw",	11,16,	0x43d,	"1W" },
!   { "sfsd",	11,16,	0x43f,	"1D" },
!   { "sfcb",	11,16,	0x4bc,	"1B" },
!   { "sfcw",	11,16,	0x4bd,	"1W" },
!   { "sfcd",	11,16,	0x4bf,	"1D" },
!   { "slob",	11,16,	0x53c,	"1B" },
!   { "slow",	11,16,	0x53d,	"1W" },
!   { "slod",	11,16,	0x53f,	"1D" },
!   { "shsb",	11,16,	0x5bc,	"1B" },
!   { "shsw",	11,16,	0x5bd,	"1W" },
!   { "shsd",	11,16,	0x5bf,	"1D" },
!   { "sltb",	11,16,	0x63c,	"1B" },
!   { "sltw",	11,16,	0x63d,	"1W" },
!   { "sltd",	11,16,	0x63f,	"1D" },
!   { "sgeb",	11,16,	0x6bc,	"1B" },
!   { "sgew",	11,16,	0x6bd,	"1W" },
!   { "sged",	11,16,	0x6bf,	"1D" },
!   { "sutb",	11,16,	0x73c,	"1B" },
!   { "sutw",	11,16,	0x73d,	"1W" },
!   { "sutd",	11,16,	0x73f,	"1D" },
!   { "sufb",	11,16,	0x7bc,	"1B" },
!   { "sufw",	11,16,	0x7bd,	"1W" },
!   { "sufd",	11,16,	0x7bf,	"1D" },
!   { "save",	 8,8,	0x62,	"1U" },
    { "sbitb",	14,24,	0x184e,	"1B2A" },
    { "sbitw",	14,24,	0x194e,	"1W2A" },
    { "sbitd",	14,24,	0x1b4e,	"1D2A" },
***************
*** 280,295 ****
    { "sbitib",	14,24,	0x1c4e,	"1B2A" },
    { "sbitiw",	14,24,	0x1d4e,	"1W2A" },
    { "sbitid",	14,24,	0x1f4e,	"1D2A" },
!   { "setcfg",	15,24,	0x0b0e,	"5D1q" },
!   { "sfsr",	14,24,	0x673e,	"5D1D" },
!   { "skpsb",	16,16,	0x0c0e,	"1i" },
!   { "skpsw",	16,16,	0x0d0e,	"1i" },
!   { "skpsd",	16,16,	0x0f0e, "1i" },
!   { "skpst",	16,16,	0x8c0e,	"1i" },
!   { "smr",	15,24,	0x0f1e,	"2D1q" },
!   { "sprb",	 7,16,	0x2c,	"2B1q" },
!   { "sprw",	 7,16,	0x2d,	"2W1q" },
!   { "sprd",	 7,16,	0x2f,	"2D1q" },
    { "subf",	14,24,	0x11be,	"1F2F" },
    { "subl",	14,24,	0x10be,	"1L2L" },
    { "subb",	 6,16,	0x20,	"1B2B" },
--- 337,352 ----
    { "sbitib",	14,24,	0x1c4e,	"1B2A" },
    { "sbitiw",	14,24,	0x1d4e,	"1W2A" },
    { "sbitid",	14,24,	0x1f4e,	"1D2A" },
!   { "setcfg",	15,24,	0x0b0e,	"5D1O" },
!   { "sfsr",	14,24,	0x373e,	"5D1D" },
!   { "skpsb",	16,16,	0x0c0e,	"1S" },
!   { "skpsw",	16,16,	0x0d0e,	"1S" },
!   { "skpsd",	16,16,	0x0f0e, "1S" },
!   { "skpst",	16,16,	0x8c0e,	"1S" },
!   { "smr",	15,24,	0x0f1e,	"2D1M" },
!   { "sprb",	 7,16,	0x2c,	"2B1P" },
!   { "sprw",	 7,16,	0x2d,	"2W1P" },
!   { "sprd",	 7,16,	0x2f,	"2D1P" },
    { "subf",	14,24,	0x11be,	"1F2F" },
    { "subl",	14,24,	0x10be,	"1L2L" },
    { "subb",	 6,16,	0x20,	"1B2B" },
***************
*** 320,325 ****
--- 377,393 ----
    { "xorb",	 6,16,	0x38,	"1B2B" },
    { "xorw",	 6,16,	0x39,	"1W2W" },
    { "xord",	 6,16,	0x3b,	"1D2D" },
+ 
+ #if defined(NS32381)
+   { "dotf",	14,24,  0x0dfe, "1F2F" },
+   { "dotl",	14,24,  0x0cfe, "1L2L" },
+   { "logbf",	14,24,  0x15fe, "1F2F" },
+   { "logbl",	14,24,  0x14fe, "1L2L" },
+   { "polyf",	14,24,  0x09fe, "1F2F" },
+   { "polyl",	14,24,  0x08fe, "1L2L" },
+   { "scalbf",	14,24,  0x11fe, "1F2F" },
+   { "scalbl",	14,24,  0x10fe, "1L2L" },
+ #endif
  };				/* notstrs */
  
  /* end: ns32k.opcode.h */
===================================================================
RCS file: RCS/ns32k-pinsn.c,v
retrieving revision 1.1
diff -c -r1.1 ns32k-pinsn.c
*** /tmp/,RCSt1006443	Fri Feb 16 17:15:37 1990
--- ns32k-pinsn.c	Sat Feb 10 18:01:59 1990
***************
*** 1,5 ****
  /* Print 32000 instructions for GDB, the GNU debugger.
!    Copyright (C) 1986,1988 Free Software Foundation, Inc.
  
  GDB is distributed in the hope that it will be useful, but WITHOUT ANY
  WARRANTY.  No author or distributor accepts responsibility to anyone
--- 1,5 ----
  /* Print 32000 instructions for GDB, the GNU debugger.
!    Copyright (C) 1986,1988, 1989 Free Software Foundation, Inc.
  
  GDB is distributed in the hope that it will be useful, but WITHOUT ANY
  WARRANTY.  No author or distributor accepts responsibility to anyone
***************
*** 35,41 ****
--- 35,213 ----
  
  #define NEXT_IS_ADDR	'|'
  
+ 
+ struct option {
+   char *pattern;		/* the option itself */
+   unsigned long value;		/* binary value of the option */
+   unsigned long match;		/* these bits must match */
+ };
+ 
+ 
+ struct option opt1[]= /* restore, exit */
+ {
+   { "r0",	0x80,	0x80	},
+   { "r1",	0x40,	0x40	},
+   { "r2",	0x20,	0x20	},
+   { "r3",	0x10,	0x10	},
+   { "r4",	0x08,	0x08	},
+   { "r5",	0x04,	0x04	},
+   { "r6",	0x02,	0x02	},
+   { "r7",	0x01,	0x01	},
+   {  0 ,	0x00,	0x00	}
+ };
+ 
+ struct option opt2[]= /* save, enter */
+ {
+   { "r0",	0x01,	0x01	},
+   { "r1",	0x02,	0x02	},
+   { "r2",	0x04,	0x04	},
+   { "r3",	0x08,	0x08	},
+   { "r4",	0x10,	0x10	},
+   { "r5",	0x20,	0x20	},
+   { "r6",	0x40,	0x40	},
+   { "r7",	0x80,	0x80	},
+   {  0 ,	0x00,	0x00	}
+ };
+ 
+ struct option opt3[]= /* setcfg */
+ {
+   { "c",	0x8,	0x8	},
+   { "m",	0x4,	0x4	},
+   { "f",	0x2,	0x2	},
+   { "i",	0x1,	0x1	},
+   {  0 ,	0x0,	0x0	}
+ };
+ 
+ struct option opt4[]= /* cinv */
+ {
+   { "a",	0x4,	0x4	},
+   { "i",	0x2,	0x2	},
+   { "d",	0x1,	0x1	},
+   {  0 ,	0x0,	0x0	}
+ };
+ 
+ struct option opt5[]= /* string inst */
+ {
+   { "b",	0x1,	0x1	},
+   { "u",	0x6,	0x6	},
+   { "w",	0x2,	0x2	},
+   {  0 ,	0x0,	0x0	}
+ };
+ 
+ #if !defined(NS32032) && !defined(NS32532)
+ #define NS32032
+ #endif
+ 
+ #if defined(NS32532)
+ struct option cpureg[]= /* lpr spr */
+ {
+   { "us",	0x0,	0xf	},
+   { "dcr",	0x1,	0xf	},
+   { "bpc",	0x2,	0xf	},
+   { "dsr",	0x3,	0xf	},
+   { "car",	0x4,	0xf	},
+   { "fp",	0x8,	0xf	},
+   { "sp",	0x9,	0xf	},
+   { "sb",	0xa,	0xf	},
+   { "usp",	0xb,	0xf	},
+   { "cfg",	0xc,	0xf	},
+   { "psr",	0xd,	0xf	},
+   { "intbase",	0xe,	0xf	},
+   { "mod",	0xf,	0xf	},
+   {  0 ,	0x00,	0xf	}
+ };
+ #endif
+ 
+ #if defined(NS32532) || defined(NS32382)
+ struct option mmureg[]= /* lmr smr */
+ {
+   { "mcr",	0x9,	0xf	},
+   { "msr",	0xa,	0xf	},
+   { "tear",	0xb,	0xf	},
+   { "ptb0",	0xc,	0xf	},
+   { "ptb1",	0xd,	0xf	},
+   { "ivar0",	0xe,	0xf	},
+   { "ivar1",	0xf,	0xf	},
+   {  0 ,	0x0,	0xf	}
+ };
+ #endif
+ 
+ #if defined(NS32032)
+ struct option cpureg[]= /* lpr spr */
+ {
+   { "upsr",	0x0,	0xf	},
+   { "fp",	0x8,	0xf	},
+   { "sp",	0x9,	0xf	},
+   { "sb",	0xa,	0xf	},
+   { "psr",	0xb,	0xf	},
+   { "intbase",	0xe,	0xf	},
+   { "mod",	0xf,	0xf	},
+   {  0 ,	0x0,	0xf	}
+ };
+ #endif
+ 
+ #if !defined(NS32532) && !defined(NS32382) /* should be defined(NS32082)... */
+ struct option mmureg[]= /* lmr smr */
+ {
+   { "bpr0",	0x0,	0xf	},
+   { "bpr1",	0x1,	0xf	},
+   { "pf0",	0x4,	0xf	},
+   { "pf1",	0x5,	0xf	},
+   { "sc",	0x8,	0xf	},
+   { "msr",	0xa,	0xf	},
+   { "bcnt",	0xb,	0xf	},
+   { "ptb0",	0xc,	0xf	},
+   { "ptb1",	0xd,	0xf	},
+   { "eia",	0xf,	0xf	},
+   {  0 ,	0x0,	0xf	}
+ };
+ #endif
+ 
  /*
+  * figure out which options are present
+  */
+ void
+ optlist(options, optionP, result)
+     int options;
+     struct option *optionP;
+     char *result;
+ {
+     if (options == 0) {
+ 	sprintf(result, "[]");
+ 	return;
+     }
+     sprintf(result, "[");
+ 
+     for (; (options != 0) && optionP->pattern; optionP++) {
+ 	if ((options & optionP->match) == optionP->value) {
+ 	    /* we found a match, update result and options */
+ 	    strcat(result, optionP->pattern);
+ 	    options &= ~optionP->value;
+ 	    if (options != 0)	/* more options to come */
+ 		strcat(result, ",");
+ 	}
+     }
+     if (options != 0)
+ 	strcat(result, "undefined");
+ 
+     strcat(result, "]");
+ }
+ 
+ list_search(reg_value, optionP, result)
+     int reg_value;
+     struct option *optionP;
+     char *result;
+ {
+     for (; optionP->pattern; optionP++) {
+ 	if ((reg_value & optionP->match) == optionP->value) {
+ 	    sprintf(result, "%s", optionP->pattern);
+ 	    return;
+ 	}
+     }
+     sprintf(result, "undefined");
+ }
+ 
+ /*
   * extract "count" bits starting "offset" bits
   * into buffer
   */
***************
*** 279,284 ****
--- 451,457 ----
    int Ivalue;
    int disp1, disp2;
    int index;
+   int size;
  
    switch (d)
      {
***************
*** 287,292 ****
--- 460,466 ----
      case 'B':
      case 'W':
      case 'D':
+     case 'Q':
      case 'A':
        addr_mode = bit_extract (buffer, ioffset-5, 5);
        ioffset -= 5;
***************
*** 422,427 ****
--- 596,622 ----
      case 'd':
        sprintf (result, "%d", get_displacement (buffer, aoffsetp));
        break;
+     case 'b':
+       Ivalue = get_displacement (buffer, aoffsetp);
+       /*
+        * Warning!!  HACK ALERT!
+        * Operand type 'b' is only used by the cmp{b,w,d} and
+        * movm{b,w,d} instructions; we need to know whether
+        * it's a `b' or `w' or `d' instruction; and for both
+        * cmpm and movm it's stored at the same place so we
+        * just grab two bits of the opcode and look at it...
+        * 
+        */
+       size = bit_extract(buffer, ioffset-6, 2);
+       if (size == 0)		/* 00 => b */
+ 	size = 1;
+       else if (size == 1)	/* 01 => w */
+ 	size = 2;
+       else
+ 	size = 4;		/* 11 => d */
+ 
+       sprintf (result, "%d", (Ivalue / size) + 1);
+       break;
      case 'p':
        sprintf (result, "%c%d%c", NEXT_IS_ADDR,
  	       addr + get_displacement (buffer, aoffsetp),
***************
*** 431,436 ****
--- 626,676 ----
        Ivalue = bit_extract (buffer, *aoffsetp, 8);
        *aoffsetp += 8;
        sprintf (result, "0x%x", Ivalue);
+       break;
+     case 'u':
+       Ivalue = bit_extract (buffer, *aoffsetp, 8);
+       optlist(Ivalue, opt1, result);
+       *aoffsetp += 8;
+       break;
+     case 'U':
+       Ivalue = bit_extract(buffer, *aoffsetp, 8);
+       optlist(Ivalue, opt2, result);
+       *aoffsetp += 8;
+       break;
+     case 'O':
+       Ivalue = bit_extract(buffer, ioffset-4, 4);
+       optlist(Ivalue, opt3, result);
+       ioffset -= 4;
+       break;
+     case 'C':
+       Ivalue = bit_extract(buffer, ioffset-4, 4);
+       optlist(Ivalue, opt4, result);
+       ioffset -= 4;
+       break;
+     case 'S':
+       Ivalue = bit_extract(buffer, *aoffsetp, 8);
+       optlist(Ivalue, opt5, result);
+       *aoffsetp += 8;
+       break;
+     case 'M':
+       Ivalue = bit_extract(buffer, ioffset-4, 4);
+       list_search(Ivalue, mmureg, result);
+       ioffset -= 4;
+       break;
+     case 'P':
+       Ivalue = bit_extract(buffer, ioffset-4, 4);
+       list_search(Ivalue, cpureg, result);
+       ioffset -= 4;
+       break;
+     case 'g':
+       Ivalue = bit_extract(buffer, *aoffsetp, 3);
+       sprintf(result, "%d", Ivalue);
+       *aoffsetp += 3;
+       break;
+     case 'G':
+       Ivalue = bit_extract(buffer, *aoffsetp, 5);
+       sprintf(result, "%d", Ivalue + 1);
+       *aoffsetp += 5;
        break;
      }
    return ioffset;

--
David Taylor
taylor@think.com, ...{ames,bloom-beacon,harvard}!think!taylor

From owner-pc532%daver@mips.com Tue Feb 20 00:22:54 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
X-Mailer: Mail User's Shell (6.4 2/14/89)
To: pc532@daver.uu.net
Subject: DSPs and FORTRAN
Date: 19 Feb 90 17:19:04 GMT (Mon)
From: ken%mm%gatech@ames.arc.nasa.gov (Ken Seefried iii)

Well, the DSP board is coming along, though slowly.  I am also
having bifg problems getting a 96000 dsp, as they are still very,
very new.  Might have to go with a 56001 just to make the thing
buildable.

The big news, however, is the fact that someone here (well, at
Georgia Tech), has decided to write a compiler for the Motorola
DSPs.  This will be (sit down) a FORTRAN compiler.  Yes, Virginia,
people do still programme in FORTRAN, and even write new compilers
for it.  In any case, this person will be writing the compiler as
a class project over the course of about 2-3 school quarters.
This individual is quite good, currently writing a paralellizing
FORTRAN compiler for the BBN Butterfly, and I suspect he will
produce a useable compiler in the time set forth.

It appears that this will be the only higher-level (sic) language
that I will be able to provide, as compilers such as the Motorola
and Ariel `c' compilers cost real $$$.  'Course, if ya' have a
NeXT machine, your golden...;')

Enjoy...

-- 
       Ken Seefried iii             ...!<anywhere>!uunet!gatech!mm!ken
         MetaMedia, Inc.              ken%mm.uucp@gatech.edu 
           Atlanta, Georgia, USA        obquote: "I feel...like a god..."
    
                         "Release the weasels..."

From owner-pc532%daver@mips.com Tue Feb 20 20:53:54 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
Date: Tue, 20 Feb 90 16:12:42 EST
From: Jerry Callen <jcallen@maxzilla.encore.com>
To: pc532@daver.bungi.com
Subject: Sample SCSI driver code, anyone?

I've been looking at the full SCSI spec and trying to picture just what
hoops I'm going to have to jump through to implement it for the floppy
controller. It's clear that I'm going to initially support just the absolute
minimum required subset; goodies like "copy" will be nice, but have to wait.

Does anyone have sample code (preferably C) to talk to ANY device via SCSI?
If the interface is through an NCR 5380 (or, of course, National DP8490), so
much the better, but I'll take what I can get.

Dave and/or Bruce: is the Minix port likely to have a SCSI driver in it
that I can snarf? Maybe the boot ROM will have some SCSI driver code? (But
that would probably not be for the DP8490, though...)

-- Jerry "my SCSI code may, in fact, be pretty scuzzy" Callen
   jcallen@encore.com
   (508) 460-0500 (work)
   (617) 876-5330 (home)

P.S. to Jon, Neil and Bdale: Have your parts arrived yet?

From owner-pc532%daver@mips.com Wed Feb 21 10:37:19 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: Sample SCSI code
Date: 20 Feb 90 22:49:11 PST (Tue)
From: daver@wombat.bungi.COM (Dave Rand)

The following is from the National Semiconductor applications note on
SCSI. It was made available to me without the requirement of a non-disclosure,
and it was indicated to be "freely available".

Please respect any copyrights.

It is a good example of how to use the DP8490, including disconnection.


As always, let me know if you have questions.

Dave Rand
dlr@bungi.com

From owner-pc532%daver@mips.com Wed Feb 21 10:37:37 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: scsi03
Date: 20 Feb 90 22:50:09 PST (Tue)
From: daver@wombat.bungi.COM (Dave Rand)

#!/bin/sh
# this is part 3 of a multipart archive
# do not concatenate these parts, unpack them in order with /bin/sh
# file spc/printer.src continued
#
CurArch=3
if test ! -r s2_seq_.tmp
then echo "Please unpack part 1 first!"
     exit 1; fi
( read Scheck
  if test "$Scheck" != $CurArch
  then echo "Please unpack part $Scheck next!"
       exit 1;
  else exit 0; fi
) < s2_seq_.tmp || exit 1
echo "x - Continuing file spc/printer.src"
sed 's/^X//' << 'SHAR_EOF' >> spc/printer.src
X		ld	a,l			;into DMA
X		out	(DMAADD),a
X		ld	a,h
X		out	(DMAADD),a
X	;
X		in	a,(DMARCA)		;Read back current address
X		ld	e,a			;and check it equals
X		in	a,(DMARCA)		;the value written to it.
X		ld	d,a
X		sbc	hl,de			;hl still contains TSTBYT address
X		jr	z,Easitst		;If correct go to EASITEST
X		ld	l,0			;else signal DMA error
X		call	ERROR
X	;
X	;
X	;********************************************************
X	;*	  		EASI TEST			*
X	;*	  Test MR2,then initialise EASI by clearing 	*
X	;*	  all registers.For 5380 test is then 		*
X	;*	  complete, for 8490 loopback test follows.	*
X	;********************************************************
X	;	  
X	Easitst:xor	a
X		out	(EASIICR),a		;Clear register and ensure in mode N
X		in	a,(EASIRPI)		;Reset interrupts
X		ld	a,+(en_blk^target^en_pchk^en_pint^en_eop)
X		out	(EASIMR2),a
X		in	a,(EASIMR2)
X		xor	+(en_blk^target^en_pchk^en_pint^en_eop)
X		jr	z,Easicon		;If correct continue
X		ld	l,1			;else EASI error
X		call	ERROR
X	;
X	Easicon:xor	a
X		out	(EASIMR2),a		;Reset MR2
X		ld	a,mode_e
X		out	(EASIICR),a		;Sets MODE E if 8490 else disables outputs
X		ld	a,loop
X		out	(EASIEMR),a		;Test device type by writing
X		in	a,(EASIEMR)		;to EMR, reading back
X		xor	loop			;and comparing.
X		jr	z,Easicn1
X	;
X	;****************************************
X	;*	DP5380 Initialization		*
X	;****************************************
X	;
X	Easicn0:ld	hl,DP8490
X		ld	(hl),false		;Set flag for DP5380
X		xor	a
X		out	(EASIICR),a		;Reenable output drivers
X		ld	a,+(target^en_pchk^en_pint)
X		out	(EASIMR2),a		;Allow parity check on selection
X		ld	hl,main_		;Set up interrupt jump table
X		ld	(RESETA),hl
X		in	a,(EASIRPI)		;Reset SCSI interrupts
X		ld	a,(SCSIID)
X		out	(EASISER),a
X		call	intA			;Enable interrupt on A.
X	;					;End of 5380 diagnostics.
X	Now:	jr	Now			;Wait for selection interrupt to jump to
X	;					;'main' of 'C' program.
X	;
X	;
X	;**********************************************************************
X	;*			Loopback Testing			      *
X	;*	Test EASI in loopback mode by asserting all initiator signals *
X	;*	and testing, asserting all target signals and testing, 	      *
X	;*	checking parity and doing a DMA transfer to TSTBYT.	      *
X	;**********************************************************************
X	;
X	;
X	Easicn1:ld	hl,DP8490
X		ld	(hl),true		;Set flag for DP8490
X	;
X		;**************************************************************
X		;*	Initially check all initiator signals can be asserted *
X		;**************************************************************
X	;
X		xor	a
X		out	(EASIMR2),a		;Initiator mode
X		ld	a,+(mode_e^as_ack^as_atn)
X		out	(EASIICR),a
X		in	a,(EASIBSR)
X		xor	+(phase_int^ck_atn^ck_ack)
X		jr	z,cont0
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Go into target mode and check all target signals can  *
X		;*	be asserted.The ODR contains test1 (054h) so when the *
X		;*	bus is asserted CSB bit 0 (DBP) should contain 0.     *
X		;**************************************************************
X	;
X	cont0:	ld	a,target
X		out	(EASIMR2),a
X		ld	a,test1			;Write word to test ODR and parity
X		out	(EASIODR),a
X		ld	a,+(req^as_msg^as_cd^as_io)
X		out	(EASITCR),a
X		ld	a,+(mode_e^as_bsy^as_sel^as_dbus)
X		out	(EASIICR),a
X		in	a,(EASICSB)
X		xor	+(ck_bsy^ck_req^ck_msg^ck_cd^ck_io^ck_sel)	;Checks ck_dbp =0
X		jr	z,cont1
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Check that CSD equals test1.			      *
X		;**************************************************************
X	;
X	cont1:	in	a,(EASICSD)
X		xor	test1
X		jr	z,cont2
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Set EMR bit 5 to enable even parity, and check the CSB*
X		;*	parity bit, which should equal one.		      *
X		;**************************************************************
X	;
X	cont2:	ld	a,+(spol^loop)
X		out	(EASIEMR),a
X		in	a,(EASICSB)
X		and	ck_dbp
X		jr	nz,cont3
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Write test2 (0aah) to the ODR, with dbus still 	      *
X		;*	asserted, and check the CSD.			      *
X		;**************************************************************
X	;
X	cont3:	ld	a,test2
X		out	(EASIODR),a
X		in	a,(EASICSD)
X		xor	test2
X		jr	z,cont4
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Check parity bit equal to zero (even parity)	      *
X		;**************************************************************
X	;
X	cont4:	in	a,(EASICSB)
X		and	ck_dbp
X		jr	z,cont5
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Change to odd parity (as SCSI spec) and check the     *
X		;*	parity bit is set.				      *
X		;**************************************************************
X	;
X	cont5:	ld	a,loop
X		out	(EASIEMR),a
X		in	a,(EASICSB)
X		and	ck_dbp			;Ensure parity bit set
X		jr	nz,cont6
X		ld	l,2
X		call	ERROR			;SCSI loopback ERROR
X	;
X		;**************************************************************
X		;*	Do a DMA target receive transfer, transferring test2  *
X		;*	to a location in memory TSTBYT. The DMA is set up     *
X		;*	for this during DMA diagnostics.		      *
X		;**************************************************************
X	;
X	cont6:	ld	a,data_out		;Set the phase for data out
X		out	(EASITCR),a
X		ld	a,+(mode_e^as_bsy^as_dbus)
X		out	(EASIICR),a
X		ld	a,blk_mode_dma
X		out	(EASIMR2),a
X		ld	hl,DIAGA		;Set interrupt response
X		ld	(RESETA),hl		;for Diagnostic mode
X		ld	a,+(loop^rpi)
X		out	(EASIEMR),a		;Reset SCSI interrupt
X		ld	a,loop
X		out	(EASIEMR),a		;Take off interrupt reset
X		call	intA			;Enable interrupt on A
X		out	(EASISDT),a		;Commence DMA transfer
X	Tstreq:	in	a,(EASICSB)
X		and	ck_req			;Wait for REQ active
X		jr	z,Tstreq
X		ld	a,+(mode_e^as_ack^as_bsy^as_dbus)
X		out	(EASIICR),a		;Assert ACK to handshake SCSI bus transfer
X		ld	a,+(mode_e^as_bsy^as_dbus)
X		out	(EASIICR),a		;Deassert ACK causing true end of DMA and interrupt
X	;
X	Here:	jr	Here			;Wait for end of DMA interrupt
X	;					;to jump to DIAGA to test DMA transfer or
X	;					;wait for selection interrupt if DIAGA
X	;					;has been executed.
X	;
X	;
X	;*****************************************************
X	;*		    SUBROUTINES			     *
X	;*****************************************************
X	;
X	;
X	;********************************************************
X	;*	  DIAGA :This responds to an EASI interrupt	*
X	;*		 in Loopback Mode.			*
X	;* 							*
X	;*	  TSTBYT contains word memory address		*
X	;*							*
X	;********************************************************
X	;
X	;
X		;********************************************
X		;*	Check for true end of dma in TCR.   *
X		;********************************************
X	;
X	DIAGA:	di
X		in	a,(EASITCR)
X		bit	7,a
X		jr	nz,Easich0
X		ld	l,3			;No end of DMA
X		call	ERROR			;Loopback DMA ERROR
X	;
X		;********************************************
X		;*	Check for true end of dma in ISR.   *
X		;********************************************
X	;
X	Easich0:ld	a,+(loop^isr)
X		out	(EASIEMR),a
X		in	a,(EASIISR)
X		xor	eedma
X		jr	z,Easich1
X		ld	l,3			;ISR EDMA bit not set or interrupt other than edma
X		call	ERROR			;Loopback DMA ERROR
X	;
X		;**************************************************
X		;*	Check for conventional end of dma in BSR. *
X		;**************************************************
X	;
X	Easich1:in	a,(EASIBSR)
X		xor	+(edma^interrupt^phase_int)
X		jr	z,Easich2
X		ld	l,3			;BSR EDMA bit not set or interrupt other than edma
X		call	ERROR			;Loopback DMA ERROR
X	;
X		;*********************************************************
X		;*	Test the word transferred to ensure it is test2. *
X		;*********************************************************
X	;
X	Easich2:ld	hl,TSTBYT
X		ld	a,(hl)
X		xor	test2
X		jr	z,Easicor
X		ld	l,3			;Word transfer error
X		call	ERROR			;Loopback DMA ERROR
X	;
X	Easicor:ld	a,+(target^en_pchk^en_pint)	;Set up parity checking for selection
X		out	(EASIMR2),a
X		ld	a,mode_e
X		out	(EASIICR),a
X		ld	a,+(loop^rpi)
X		out	(EASIEMR),a
X		ld	a,imr			;Set up for reading IMR
X		out	(EASIEMR),a
X		ld	a,+(eedma^mpe^dphs^aphs^ebsy^earb)
X		out	(EASIIMR),a		;Only allow interrupt on SEL or sper
X		ld	hl,main_		;Set Enhanced Mode interrupt
X		ld	(RESETA),hl		;response
X		ld	a,(SCSIID)
X		out	(EASISER),a
X		call	intA			;Mask off interrupts B & C
X		ret				;Returns to jr here statement
X						;and waits for selection interrupt
X	;
X	;
X	;
X	;********************************************************
X	;*	  ERROR :This flashes a LED error message	*
X	;*							*
X	;*	  INPUTS :l is loaded with error number		*
X	;*		  which is flashed in 4 bit binary	*
X	;*		  code.The LED goes off for 1/2 sec.	*
X	;*		  for a 0, and 1 sec. for a 1.The	*
X	;*		  M.S.B. is flashed first.The code	*
X	;*		  is continually repeated after		*
X	;*		  2 sec. intervals.			*
X	;*							*
X	;*	  This routine is continuously run once  	*
X	;*	  entered, so no register storage required.	*
X	;*							*
X	;********************************************************
X	;
X		PUBLIC ERROR
X	ERROR:	ld	a,led_on
X		ld	e,l
X		rlc	e			;Shift lower nibble to
X		rlc	e			;upper nibble to allow
X		rlc	e			;bit test
X		rlc	e
X	Redo:	ld	d,e			;Save error number to continually display 
X		ld	b,4			;Number of bits to be displayed
X	Notend:	rlc	d			;If bit is zero
X		jr	nc,Shrt			;Short flash (1/2 sec.)
X		out	(PIOCC),a
X		ld	l,2			;else long flash (1 sec.)
X		call	DELAY
X	Shrt:	out	(PIOCC),a
X		ld	l,2
X		call	DELAY
X		out	(PIOCS),a
X		ld	l,2			;LED on for 1/2 sec. between flashes
X		call	DELAY
X		djnz	Notend
X		ld	l,8			;LED on for 2 sec. before
X		call	DELAY			;repeating message
X		jr	Redo
X	;
X	;
X	;********************************************************
X	;*	  DELAY :This creates a delay of 1/4 sec.	*
X	;*							*
X	;*	  Inputs :l sets the number of 1/4 sec. delays	*
X	;*	  All registers used are stored on stack	*
X	;*							*
X	;********************************************************
X	;
X		PUBLIC DELAY
X	DELAY:	push	bc
X		push	af
X	Outloop:ld	bc,DELVAL		;Counting down from this
X	Inloop:	dec	bc			;value causes 1/4 sec. delay
X		ld	a,b
X		or	c
X		jr	nz,Inloop
X		dec	l
X		jr	nz,Outloop
X		pop	af
X		pop	bc
X		ret
SHAR_EOF
echo "File spc/printer.src is complete"
chmod 0664 spc/printer.src || echo "restore of spc/printer.src fails"
echo "x - extracting spc/prnsym.src (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/prnsym.src &&
X	;**************************************************
X	;*	This file contains the port addresses of  *
X	;*	all I/O registers, the memory devices 	  *
X	;*	start locations, the RAM length and some  *
X	;*	miscellaneous constants.		  *
X	;**************************************************
X	;
X	;
X	;
X	;	*******************************
X	;	  NSC831 PIO REGISTER ADDRESSES
X	;	*******************************
X	;
X	PIOA:	EQU 80H			;Data Registers
X	PIOB:	EQU 81H
X	PIOC: 	EQU 82H
X	;
X	PIODDRA:EQU 84H			;Data Direction Registers
X	PIODDRB:EQU 85H
X	PIODDRC:EQU 86H
X	;
X	PIOMDR:	EQU 87H			;Mode Definition Register
X	;
X	PIOAC:	EQU 88H			;Port bit-clear
X	PIOBC:	EQU 89H
X	PIOCC:	EQU 8AH
X	;
X	PIOAS:	EQU 8CH			;Port bit-set
X	PIOBS:	EQU 8DH
X	PIOCS:	EQU 8EH
X	;
X	;
X	;	**********************************
X	;	      DMA REGISTER ADDRESSES
X	;	**********************************
X	;
X	DMAADD:	EQU 20H			;W/O Base & Current Address
X	DMARCA:	EQU 20H			;R/O Current Address
X	;
X	DMACNT:	EQU 21H			;W/O Base & Current Word Count
X	DMARWC:	EQU 21H			;R/O Current Word Count
X	;
X	DMAMOD:	EQU 2BH			;W/O Mode register
X	;
X	DMAMCL:	EQU 2DH			;W/O Master Clear register
X	;
X	DMAMSK:	EQU 2FH			;W/O Mask register (all masks)
X	;
X	;
X	;	***********************************
X	;	      EASI REGISTER ADDRESSES
X	;	***********************************
X	;
X	EASIODR:EQU 00			;W/O Output Data Register
X	EASICSD:EQU 00			;R/O Current SCSI Data
X	;
X	EASIICR:EQU 01			;R/W Initiator Command Register
X	;
X	EASIMR2:EQU 02			;R/W Mode Register 2
X	;
X	EASITCR:EQU 03			;R/W Target Command Register
X	;
X	EASISER:EQU 04			;W/O Select Enable Register
X	EASICSB:EQU 04			;R/O Current SCSI Bus Status
X	;
X	EASISDS:EQU 05			;W/O Start DMA Send
X	EASIBSR:EQU 05			;R/O Bus & Status Register
X	;
X	EASISDT:EQU 06			;W/O Start DMA Target Rx
X	EASIIDR:EQU 06			;R/O Input Data Register
X	;
X	EASISDI:EQU 07			;W/O Start DMA Initiator Rx
X	EASIRPI:EQU 07			;R/O Reset Parity & Interrupt  Latches
X	EASIEMR:EQU 07			;R/W Enhanced Mode Register
X	EASIIMR:EQU 07			;W/O Interrupt Mask Register
X	EASIISR:EQU 07			;R/O Interupt Status Register
X	;
X	;
X	;
X	;	********************
X	;	  MEMORY ADDRESSES
X	;	********************
X	;
X	ROMSTT:	EQU 00			;ROM Starting Address
X	RAMSTT:	EQU 8000H		;RAM Starting Address
X	RAMLEN:	EQU 8000H		;Number of RAM locations
X	;
X	;
X	;	*****************
X	;	  MISCELLANEOUS
X	;	*****************
X	;
X	STKDATA:EQU 00			;Initial stack value
X	DELVAL:	EQU 24038		;2.5MHz=24038, 4MHz =38641, 
X	;				;for delay counter
X	INTMSK:	EQU 0BBH		;CPU Mask register address
SHAR_EOF
chmod 0664 spc/prnsym.src || echo "restore of spc/prnsym.src fails"
echo "x - extracting spc/process.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/process.lib &&
X/**********************************************************
X*							  *
X*	process_cmd(): This routine fetches the first     *
X*		       command byte and executes the 	  *
X*		       instruction.			  *
X*							  *
X**********************************************************/
X
Xprocess_cmd()
X{
X	int i;
X	switch(com[0])
X	{
X		case TEST_UNIT_READY: ck_printer();
X				      break;
X
X		case REQUEST_SENSE: send_sense();
X				    break;
X
X		case PRINT:	if (sense[0])				/* Printer possibly in error state	*/
X				{
X					stat=CHECK_CONDITION;		/* Initiator must check sense before continuing	*/
X					break;
X				}
X				data_len = (com[4] + (com[3] * 256));			/* Read the amount of data to be sent	*/
X				if (!reserved || com[2] || !data_len || (data_len > BUFFLIM))
X										/* Check the amount of data is not greater  	*/
X				{						/* than the buffer limit, or equal to zero   	*/
X					sense[0]=ILLEGAL_REQUEST;
X					stat=CHECK_CONDITION;
X				}
X				else
X					print_cmd();		/* DMA into buffer data_len of data	*/
X			    	break;
X
X		case RESERVE_UNIT: if (!initid)
X				   {
X					sense[0]=ILLEGAL_REQUEST;
X					stat=CHECK_CONDITION;
X				   }
X				   else
X				   {
X				   	if (reserved && (reserved != initid))
X						stat=RESERVATION_CONFLICT;
X				   	else
X						reserved=initid;
X				   }
X				   break;
X
X		case RELEASE_UNIT:  if (!reserved)
X				    {
X					sense[0]=ILLEGAL_REQUEST;
X					stat=CHECK_CONDITION;
X				    }
X				    else
X				    {
X					if (reserved && (reserved != initid))
X						stat=RESERVATION_CONFLICT;
X				   	else
X						reserved=FALSE;
X				    }
X				    break;
X
X		case FLUSH_BUFFER:  write(PIOC, (LED_ON | PRINTER_INIT));	/* Re-initialise printer to empty any buffer	*/
X				    write(PIOC,LED_ON);
X				    print_on = in_print = FALSE;	/* Stop print	*/
X				    front = rear = bottom;		/* Empty SPC buffer	*/
X				    break;
X
X		case FORMAT:
X		case SLEW_PRINT:
X		case INQUIRY:
X		case RECOVER_BUFFERED_DATA:
X		case MODE_SELECT:
X		case COPY:
X		case MODE_SENSE:
X		case STOP_PRINT:
X		case RECEIVE_DIAGNOSTIC_RESULTS:
X		case SEND_DIAGNOSTICS:
X		default: sense[0]=ILLEGAL_REQUEST;
X			 stat=CHECK_CONDITION;
X	}
X}
X
X/**********************************************************
X*							  *
X*	ck_printer(): This is called in response to a     *
X*		      'test unit ready' command.It checks *
X*		      the printer and updates the status  *
X*		      buffer and the sense data.	  *
X*							  *
X**********************************************************/
X
Xck_printer()
X{
X	if(read(PIOB) & PRINTER_ERROR)
X	{
X		if(!(read(PIOB) & PRINTER_PE))
X		{
X			sense[0]=MEDIUM_ERROR;
X			stat=CHECK_CONDITION;
X		}
X		else
X		{
X			sense[0]=UNIT_ATTENTION;
X			stat=CHECK_CONDITION;
X		}
X	}
X	else
X	{
X		sense[0]=NO_SENSE;
X		stat=GOOD;
X	}
X}
X
X/**********************************************************
X*							  *
X*	send_sense(): In response to a 'request sense'    *
X*		      command this routine sends the data *
X*		      contained in the status buffer,     *
X*		      using a DMA transfer.		  *
X*							  *
X**********************************************************/
X
Xsend_sense()
X{
X	if(com[4] > MAX_SENSE)				/* This byte indicates that the initiator requests extended 	*/
X	{						/* sense which this software does not support.			*/
X		sense[0]=ILLEGAL_REQUEST;
X		stat=CHECK_CONDITION;
X	}
X	else
X	{
X		write(DMAMCL,DONT_CARE);
X		write(DMAMOD,(SINGLE_MODE | READ_TRANSFER));
X		write(DMAMSK,CHANNEL0);
X		dmawrit(DMAADD,&sense[0]);
X		dmawrit(DMACNT,(SENSE_BYTES-1));
X		single_dma_in(DATA_IN);
X	}
X}
SHAR_EOF
chmod 0664 spc/process.lib || echo "restore of spc/process.lib fails"
echo "x - extracting spc/scsi.c (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/scsi.c &&
X/********************************************************
X*							*
X*	FILENAME: SCSI.C				*
X*	VERSION:  1.1					*
X*	DATE:	  MARCH 23 1988				*
X*	APPLICATION: EASI DEMO BOARD			*
X*	WRITTEN BY: ANDREW DAVIDSON			*
X*		    CMOS LOGIC DESIGN			*
X*		    NSUK GREENOCK			*
X*							*
X********************************************************/
X
X
X/********************************************************************
X*								    *
X*	This program follows a diagnostic program,	    	    *
X*	(PRINTER.SRC) written in assembly language, which tests and *
X*	initialises the EASI, DMA and PIO, and then sets up the     *
X*	interrupts.This program waits for a selection, checks it is *
X*	valid, fetches the command, stores it in a buffer, executes *
X*	a limited set of commands and returns status.If the 	    *
X*	initiator supports disconnection (shown by sending an 	    *
X*	identify message with the disconnection bit set) the device *
X*	will disconnect, if selected during a print, then reconnect *
X*	when it has sufficient space in its buffer.All constants    *
X*	in upper case, functions and variables are in lower case.   *
X*								    *
X********************************************************************/ 
X
X#include sym.h					/* These files contain the I\O addresses, constant values and	*/
X#include const.h				/* SCSI command, message and status values.			*/
X#include commands.h
X
Xextern char read(port);				/* All of these routines are written in assembly language and	*/
Xextern char write(port,data);			/* are in file EASIO.SRC.					*/
Xextern char dmawrit(port,data);
Xextern int dmaread(port);
Xextern char intA();
Xextern char IDtest();
Xextern char dsi();
Xextern char eni();
X
Xextern char error(num);				/* This is a public function in PRINTER.SRC	*/
X
Xextern char SCSIID;				/* SCSIID is read in from switches in PRINTER.SRC	*/
Xextern char DP8490;				/* DP8490 is a flag set in PRINTER.SRC to show whether a */
X						/* DP5380 or DP8490 is inserted.			 */
X
Xextern int (*RESETA)();				/* This is a variables set up in PRINTER.SRC.This address */
X						/* is required to set up the interrupt jump table.	  */
X
Xint gen_int();					/* These functions are in command.lib and print.lib.They are defined 	*/
Xint serva();					/* here as their addresses need to be known to set up the interrupt 	*/
Xint servn();					/* jump table.								*/
X
X
Xint i, data_len,data1,data2,recon_data;
X
Xchar ano_interrupt,temp,recon,reserved,no_win,release,poss_sel,next,previous;
Xchar mescon,fail,parity_error,phase_error,print_on,mess_err,in_print;
Xchar stat,sense[SENSE_BYTES],mess_out[MESSAGE_BYTES],buffer[BUFFSZ];
Xchar com[COMMAND_BYTES],com_r[COMMAND_BYTES],message;
Xchar initid,initid_r,discon;
Xchar *point,*front,*rear,*top,*bottom;
X
Xmain()
X{
X	select();
X	set_up();
X	if (stat==CHECK_CONDITION)
X		 fail=TRUE;
X	else
X	{
X		fetch_cmd();
X		if (parity_error)
X		{
X			fail=parity_error=FALSE;
X			message=RESTORE_POINTERS;
X			messin();
X			if (!fail)				/* Check message phase succesful.		*/
X			{
X				fetch_cmd();
X				if (!parity_error)
X				{
X					sense[0]=NO_SENSE;
X					stat=GOOD;
X				}
X			}
X		}
X		if (!fail)
X		{
X			if (!reserved && print_on && !recon && discon)	/* No reservation but currently printing	*/
X				disconect();
X			else
X			{
X				if (!recon)
X				{
X					if (reserved)
X					{
X						if (reserved==initid)	
X						{
X							if (print_on)
X							{
X								if (next)
X								{
X									process_cmd();
X									next=FALSE;
X								}
X								else
X								{
X									if (discon)
X									{
X										release=TRUE;
X										disconect(); /* All other commands cause a 	  */
X									}		     /* disconnection 			  */
X									else
X										stat=BUSY;  /* Initiator does not support    */
X								}		     	/* disconnection and since currently */
X										     	/* printing, cant process command.   */
X							}
X							else
X								process_cmd();
X						}
X						else
X							stat=RESERVATION_CONFLICT;
X					}
X					else
X					{
X						if(!print_on)
X							process_cmd();		/* print_on must be checked in case a     */
X										/* print is current, from an initiator    */						
X										/* that has released the unit.		  */
X						else
X							if (!discon && next)
X							{
X								process_cmd();
X								next=FALSE;
X							}
X							else			/* Either already waiting to reconnect or  */
X								stat=BUSY;	/* no room on print buffer.		   */
X					}
X				}
X				else
X					stat=BUSY;			/* Already waiting to reconnect	*/
X				if (!release)			        /* Flag set to show bus has been released for later */
X				{				        /* reconnection. 				   */
X					status();
X					message=COMMAND_COMPLETE;
X					messin();
X					reset();
X					if (!in_print  && print_on && !stat)  	/* status must be good */
X						outbuf();
X					while (recon && !print_on) reconnect();	/* Can only reconnect when print has finished	*/
X				}
X				release=FALSE;
X			}
X		}
X	}
X	if (fail)
X	{
X		status();
X		message=COMMAND_COMPLETE;
X		messin();
X		reset();
X	}
X	eni();		/* Interrupts not enabled until previous decisions are finished	*/
X}
X
X#include command.lib
X#include process.lib
X#include dma.lib
X#include print.lib
X#include arbitrat.lib
SHAR_EOF
chmod 0664 spc/scsi.c || echo "restore of spc/scsi.c fails"
echo "x - extracting spc/sym.h (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/sym.h &&
X/*************************************************************
X	Define port addresses for i/o operations.
X	These operations use the functions
X	read(port) and write(port,data).
X**************************************************************/
X
X#define PIOA 0x80
X#define PIOB 0x81
X#define PIOC 0x82
X
X#define PIODDRA 0x84
X#define PIODDRB 0x85
X#define PIODDRC 0x86
X
X#define PIOMDR 0x87
X
X#define PIOAC 0x88
X#define PIOBC 0x89
X#define PIOCC 0x8A
X
X#define PIOAS 0x8C
X#define PIOBS 0x8D
X#define PIOCS 0x8E
X
X
X#define DMAADD 0x20
X#define DMARCA 0x20
X
X#define DMACNT 0x21
X#define DMARWC 0x21
X
X#define DMAMOD 0x2B
X
X#define DMAMCL 0x2D
X
X#define DMAMSK 0x2F
X
X
X#define EASIODR 0x00
X#define EASICSD 0x00
X
X#define EASIICR 0x01
X
X#define EASIMR2 0x02
X
X#define EASITCR 0x03
X
X#define EASISER 0x04
X#define EASICSB 0x04
X
X#define EASISDS 0x05
X#define EASIBSR 0x05
X
X#define EASISDT 0x06
X#define EASIIDR 0x06
X
X#define EASISDI 0x07
X#define EASIRPI 0x07
X#define EASIEMR 0x07
X#define EASIIMR 0x07
X#define EASIISR 0x07
X
X
X#define INTMSK 0xBB
SHAR_EOF
chmod 0664 spc/sym.h || echo "restore of spc/sym.h fails"
rm -f s2_seq_.tmp
echo "You have unpacked the last part"
exit 0

From owner-pc532%daver@mips.com Wed Feb 21 10:38:03 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: scsi01
Date: 20 Feb 90 22:49:40 PST (Tue)
From: daver@wombat.bungi.COM (Dave Rand)

#!/bin/sh
# shar:	Shell Archiver  (v1.22)
#
# This is part 1 of a multipart archive                                    
# do not concatenate these parts, unpack them in order with /bin/sh        
#
#	Run the following text with /bin/sh to create:
#	  readme.bat
#	  asc.doc
#	  root.doc
#	  spc.doc
#	  util.doc
#	  asc/asc.c
#	  asc/asccom.lib
#	  asc/ascrot.lib
#	  asc/ascstruc.lib
#	  asc/check.lib
#	  asc/constant.h
#	  asc/stoprint.c
#	  asc/util.lib
#	  spc/arbitrat.lib
#	  spc/command.lib
#	  spc/commands.h
#	  spc/const.h
#	  spc/dma.lib
#	  spc/easio.src
#	  spc/easisym.src
#	  spc/print.lib
#	  spc/printer.src
#	  spc/prnsym.src
#	  spc/process.lib
#	  spc/scsi.c
#	  spc/sym.h
#
mkdir asc spc
if test -r s2_seq_.tmp
then echo "Must unpack archives in sequence!"
     next=`cat s2_seq_.tmp`; echo "Please unpack part $next next"
     exit 1; fi
echo "x - extracting readme.bat (Text)"
sed 's/^X//' << 'SHAR_EOF' > readme.bat &&
Xecho off
Xcls
Xtype root.doc
Xpause
Xcls
Xtype spc.doc
Xpause
Xcls
Xtype asc.doc
Xpause
Xcls
Xtype util.doc
Xpause
Xecho on
SHAR_EOF
chmod 0664 readme.bat || echo "restore of readme.bat fails"
echo "x - extracting asc.doc (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc.doc &&
X
X		National Semiconductors Printer Controller
X
X		     Use of the ASC-88 Host Adaptor
X
XThis directory contains the source and executable code required to use an 
XASC-88 host adaptor card, installed in a PC, to drive a SCSI Printer Controller
X(SPC). This code is outlined in the document "SCSI Printer Controller Users
XGuide".
X
XThere are two executable files in this directory, PRINTOUT.EXE and STOPRINT.EXE
Xprintout will pass the data in a defined file to the SPC to be printed. It is 
Xused in the form:
X			printout filename
X
Xstoprint will flush the SPC buffer and re-initialize the printer. It is used in
Xthe form:
X			stoprint
X
XFor optimum performance the user should ensure that disconnection is enabled
Xfor the ASC-88 board. This is done by running the ASC-88 program ASC_MODE
Xand typing 'Y' next to 'DISCONNECTION'.
SHAR_EOF
chmod 0664 asc.doc || echo "restore of asc.doc fails"
echo "x - extracting root.doc (Text)"
sed 's/^X//' << 'SHAR_EOF' > root.doc &&
X
X
X	    National Semiconductors SCSI Printer Controller
X
XThis disk contains three directories, 'SPC', 'ASC' and 'UTIL'.
X
XDirectory 'SPC' contains the source and absolute code for a SCSI Printer
XController (SPC) board. This board and software is documented in an
Xapplication note called "A SCSI Printer Controller using either the DP8490
XEASI or DP5380 ASI".
X
XDirectory 'ASC' contains the source and executable code required to use an
XASC-88 host adaptor to drive the SPC. This is further explained in the document
X"SCSI Printer Controller Users Guide".
X
X
XDirectory 'UTIL` contains various sundry general purpose utilities unique to
Xthe operation of the ASC host adapter card.
SHAR_EOF
chmod 0664 root.doc || echo "restore of root.doc fails"
echo "x - extracting spc.doc (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc.doc &&
X
X	National Semiconductors SCSI Printer Controller
X
XThis directory contains all of the code used in the SCSI Printer Controller
X(SPC) demonstration board, documented in the application note "A SCSI Printer
XController using either the DP8490 EASI or DP5380 ASI".
X
XThe main source code is contained in SCSI.C and the libraries COMMAND.LIB, 
XPROCESS.LIB, DMA.LIB, PRINT.LIB and ARBITRAT.LIB. The constants used in these
Xfiles are contained in SYM.H, CONST.H and COMMANDS.H. All of these files are 
Xwritten in the high level language 'C'.
X
XThe boards diagnostic software is contained in PRINTER.SRC, with it's constants
Xdefined in EASISYM.SRC and PRNSYM.SRC. EASIO.SRC contains functions commonly
Xused by both the diagnostics and main code. These files are written in a Z80 
Xcompatible assembly language, for an NSC800.
X
XThe purpose of the diagnostics is to ensure that the board is operational and
Xto initialize it. The main code responds to a SCSI selection and implements a
Xlimited set of printer commands. SCSI.ABS contains the compiled, assembled and
Xlinked absolute code, ready for downloading to an EPROM.
SHAR_EOF
chmod 0664 spc.doc || echo "restore of spc.doc fails"
echo "x - extracting util.doc (Text)"
sed 's/^X//' << 'SHAR_EOF' > util.doc &&
X                     ASC-88 SCSI Manager 3 documentation
X
XFile Descriptions:
X------------------
X
X     ASC_MODE.EXE  - utility for changing various
X                     ASC-88 host adapter parameters, eg. Host ID.
X                     (see ASC-88 User's Manual)
X
X     SCSITEST.COM  - single screen utility for issuing single SCSI commands
X                     and viewing data.  It includes a psuedo logic analyser
X                     capability for seeing the current condition of SCSI
X                     bus signals.
X
X     SCSI.HLP      - help file for SCSITEST.COM.
X
X     SCSI_MAP.COM  - monitors and displays entire SCSI address matrix showing
X                     devices that are present on the bus.  Ideal for locating
X                     device IDs.
X
SHAR_EOF
chmod 0664 util.doc || echo "restore of util.doc fails"
echo "x - extracting asc/asc.c (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/asc.c &&
X/********************************************************
X*							*
X*	FILENAME: ASC.C					*
X*	DATE: March 8 1988				*
X*	VERSION: 1.0					*
X*	APPLICATION: ASC-88 driver software for SPC	*
X*	WRITTEN BY: ANDREW M. DAVIDSON			*
X*		    LOGIC DESIGN			*
X*		    NATIONAL SEMICONDUCTOR UK. LTD.	*
X*							*
X********************************************************/
X
X/************************************************************************
X*	This file is used to implement a PRINT using an ASC-88 host 	*
X*	adaptor, installed in a PC, to select an SPC, SCSI Printer	*
X*	Controller. The host adaptor is accessed by an MS-DOS interrupt	*
X*	, and its functions determined by a Job Control Block. To	*
X*	implement a print this software sends the following sequence of	*
X*	commands:							*
X*									*
X*	TEST UNIT READY: to ensure the printer is operational.		*
X*									*
X*	RESERVE UNIT: the printer must be reserved for use by this	*
X*		      initiator only before a print.			*
X*									*
X*	PRINT: this transfers the data to be printed to the SPC. The	*
X*	       maximum length of data per transfer is 2KB, for reasons  *
X*	       explained in the SPC applications note.			*
X*									*
X*	REQUEST SENSE: to ensure the printer is still operational. If 	*
X*		       an error occurs when the SPC transfer data to 	*
X*		       the printer sense will be set.			*
X*									*
X*	RELEASE UNIT: when finished transferring data to the SPC the 	*
X*		      unit should be released to allow other initiators *
X*		      to use it.					*
X*									*
X************************************************************************/
X
X#include <stdio.h>		/* Contains the definitions of stream I/O functions	*/
X#include <conio.h>		/* Contains the definitions of console I/O functions	*/
X#include <dos.h>		/* Contains the definitions for MS-DOS interface functions	*/
X
X#include <constant.h>		/* Contains the constant values used in this software	*/
X#include <ascstruc.lib>		/* Contains Job Control Block structure	*/
X#include <asccom.lib>		/* Contains Job Control Blocks for particular SCSI commands	*/
X
XFILE *fopen(),*stream;
X
Xchar ch,try_again,finished,fail;
Xint i;
X
Xmain(argc,argv)		/* This fetches the filename from the keyboard	*/
Xint argc;
Xchar *argv[];
X{
X	fail=finished=FALSE;
X	try_again=TRUE;
X
X	if ((stream=fopen(*++argv,"r"))==NULL)		/* Opens specified file and returns a pointer, stream, 	*/
X	{						/* which is subsequently used to access the file.	*/
X		printf("cannot open file");
X		goto true_end;
X	}
X	while (try_again)	/* Loop is executed until status() resets the variable	*/
X	{
X		test();		/* Sends TEST UNIT READY command to SPC	*/
X		status();	/* This checks the returned status	*/
X	}
X	if (fail)	goto true_end;
X	try_again=TRUE;
X	while (try_again)
X	{
X		reserve();	/* Sends RESERVE UNIT command to SPC	*/
X		status();
X	}
X	if (fail)	goto true_end;
X	while (!finished)
X	{
X		for (i=0;(i<=BUFFLIM) && ((ch = getc(stream)) != EOF);i++)	/* Fetches data from file until it reaches the	*/
X			buffer[i]=ch;						/* end of file charater EOF or until the buffer */
X		if (ch==EOF)							/* is full.					*/
X		{
X			finished=TRUE;
X			if (feof(stream))	/* EOF is also used to indicate an error, so this function checks */	
X			{			/* that the file is finished.					  */
X				buffer[i++]=FORM_FEED;		/* Set the last character to give a form feed	*/
X				try_again=TRUE;
X				while(try_again)
X				{
X					print_data(i);		/* Sends PRINT command to SPC	*/
X					status();
X					if (fail)	goto end;	/* An effort must be made to release the unit	*/
X				}
X			}
X			else
X				printf("error reading file");		/* EOF was returned to indicate an error	*/
X		}
X		else
X		{
X			try_again=TRUE;
X			while(try_again)
X			{
X				print_data(i);		/* Sends PRINT command to SPC	*/
X				status();
X				if (fail)	goto end;
X			}
X		}
X	}
X	try_again=TRUE;
X	while(try_again)
X	{
X		request();		/* Sends REQUEST SENSE command to SPC	*/
X		status();
X	}
X	message();
X	if (fail)	goto true_end;
Xend:	try_again=TRUE;
X	while(try_again)
X	{
X		release();		/* Sends RELEASE UNIT command to SPC	*/
X		status();
X	}
Xtrue_end:	fclose(stream);		/* Close file	*/
X}	
X
X#include <ascrot.lib>			/* Contains routines for responding to returned data	*/
X#include <util.lib>			/* Contains command for writing error data on screen	*/
SHAR_EOF
chmod 0664 asc/asc.c || echo "restore of asc/asc.c fails"
echo "x - extracting asc/asccom.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/asccom.lib &&
X/********************************************************
X*	These routines set up the Job Control Block	*
X*	and initiate the SCSI command by generating	*
X*	an MS-DOS interrupt.				*
X********************************************************/
X
Xvoid test()
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;	/* Preset status to fault value */
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = IN;		/* Input direction is set (although no data transfer)	*/
X	jcb_1.data_len = 0;		/* No data transfer		*/
X	jcb_1.data_addr = &buffer[0];	/* Input bytes would be to buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = TEST_UNIT_READY;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0;
X	jcb_1.cdb_3 = 0;
X	jcb_1.cdb_4 = 0;
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;		/* User structure address	*/
X	regs.x.bx = FP_OFF(p);		/* These registers must contain the address of	*/
X	sregs.es = FP_SEG(p);		/* the first byte of the JCB.			*/
X
X	regs.h.ah = SCSI_PRO;			/* This register is used to define which ASC-88 software is used */
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);	/* Generate MS-DOS interrupt	*/
X}
X
X
X
Xvoid request()
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = IN;
X	jcb_1.data_len = SENSE_BYTES;	/* Sense data transfer		*/
X	jcb_1.data_addr = &sense[0];	/* Input bytes to sense buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = REQUEST_SENSE;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0;
X	jcb_1.cdb_3 = 0;
X	jcb_1.cdb_4 = 0;
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;
X	regs.x.bx = FP_OFF(p);
X	sregs.es = FP_SEG(p);
X
X	regs.h.ah = SCSI_PRO;
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);
X}
X
X
Xvoid print_data(data)
Xint data;
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = OUT;
X	jcb_1.data_len = data;		/* Data to be printed		*/
X	jcb_1.data_addr = &buffer[0];	/* Output data from buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = PRINT;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0x00;		/* These three bytes contain	*/
X	jcb_1.cdb_3 = (data/0x100);	/* the amount of data to be	*/
X	jcb_1.cdb_4 = (data%0x100);	/* transferred			*/
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;
X	regs.x.bx = FP_OFF(p);
X	sregs.es = FP_SEG(p);
X
X	regs.h.ah = SCSI_PRO;
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);
X}
X
X
Xvoid reserve()
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = IN;		/* Input direction (although no data transfer)	*/
X	jcb_1.data_len = 0;		/* No data transfer		*/
X	jcb_1.data_addr = &buffer[0];	/* Input bytes would be to buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = RESERVE_UNIT;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0;
X	jcb_1.cdb_3 = 0;
X	jcb_1.cdb_4 = 0;
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;
X	regs.x.bx = FP_OFF(p);
X	sregs.es = FP_SEG(p);
X
X	regs.h.ah = SCSI_PRO;
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);
X}
X
X
Xvoid release()
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = IN;		/* Input direction (although no data transfer)	*/
X	jcb_1.data_len = 0;		/* No data transfer		*/
X	jcb_1.data_addr = &buffer[0];	/* Input bytes would be to buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = RELEASE_UNIT;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0;
X	jcb_1.cdb_3 = 0;
X	jcb_1.cdb_4 = 0;
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;
X	regs.x.bx = FP_OFF(p);
X	sregs.es = FP_SEG(p);
X
X	regs.h.ah = SCSI_PRO;
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);
X}
X
X
Xvoid flush()
X{
X	char far *p;
X	
X	jcb_1.status_byte =FAULT;
X	jcb_1.target_id = TARGET_ID;
X	jcb_1.lun_no = 0;
X	jcb_1.arb = YES;
X	jcb_1.initiator_id = YES;
X	jcb_1.attention = YES;
X	jcb_1.disconnect = YES;
X	jcb_1.direction = IN;		/* Input direction (although no data transfer)	*/
X	jcb_1.data_len = 0;		/* No data transfer		*/
X	jcb_1.data_addr = &buffer[0];	/* Input bytes would be to buffer	*/
X	jcb_1.cdb_len = 6;
X
X	jcb_1.cdb_0 = FLUSH_BUFFER;
X	jcb_1.cdb_1 = 0;
X	jcb_1.cdb_2 = 0;
X	jcb_1.cdb_3 = 0;
X	jcb_1.cdb_4 = 0;
X	jcb_1.cdb_5 = 0;
X
X	p = &jcb_1.status_byte;
X	regs.x.bx = FP_OFF(p);
X	sregs.es = FP_SEG(p);
X
X	regs.h.ah = SCSI_PRO;
X	int86x(SCSI_BIOS,&regs,&regs,&sregs);
X}
SHAR_EOF
chmod 0664 asc/asccom.lib || echo "restore of asc/asccom.lib fails"
echo "x - extracting asc/ascrot.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/ascrot.lib &&
X/************************************************
X*	These functions are called by ASC.C to	*
X*	process information returned from the 	*
X*	ASC-88.					*
X************************************************/
X
X/************************************************
X*	This function checks the status 	*
X*	returned after a SCSI command was	*
X*	attempted.				*
X************************************************/
X 
Xstatus()
X{
X	switch (jcb_1.status_byte)
X	{
X		case GOOD:	try_again=FALSE;	/* Command has been correctly implemented so user can stop sending it	*/
X				break;
X
X		case CHECK_CONDITION:	error();	/* An error was detected by SPC so it set up sense and returned this	*/
X					break;		/* status. This is dealt with in error().				*/
X
X		case BUSY:	break;			/* Resend command as SPC was busy processing data	*/
X
X		case RESERVATION_CONFLICT:	break;	/* Resend command as SPC was reserved by another initiator	*/
X
X		case ARBITRATION_TIMEOUT:	break;	/* Re-attempt to get bus and send command	*/
X
X		case FAULT:	printf("Cannot find SCSI port");	/* The ASC-88 has failed to respond to the MS-DOS	*/
X				fail=TRUE;				/* interrupt, leaving status at the preset FAULT value.	*/
X				try_again=FALSE;			/* This causes the error message to be displayed and	*/
X				break;					/* the program to be terminated.			*/
X
X		default:	printf("Target returns incompatible status");	/* Status not supported by SPC has been 	*/
X				putout();					/* returned. This indicates an error detected 	*/
X				fail=TRUE;					/* by ASC-88 i.e. DMA over-run, selection 	*/
X				try_again=FALSE;				/* timeout etc. Relevant data, such as status, 	*/
X				break;						/* is put on the screen to allow the user to 	*/
X	}									/* solve the problem, and the program is	*/
X}										/* terminated.					*/
X
X/************************************************
X*	This function is called if the SPC	*
X*	returns a status of CHECK CONDITION.	*
X************************************************/
X
Xerror()
X{
X	try_again=TRUE;
X	while(try_again)
X	{
X		request();
X		if (jcb_1.status_byte != (BUSY | ARBITRATION_TIMEOUT))	/* This command is only retried if the	*/
X			try_again=FALSE;				/* SPC is BUSY or cannot get the bus.	*/
X	}
X	if (jcb_1.status_byte != GOOD)
X	{
X		printf("ERROR:sense not returned");
X		fail=TRUE;
X		try_again=FALSE;
X	}
X	else
X	{
X		switch (sense[0])
X		{
X			case NO_SENSE:	printf("ERROR:'no sense '");	/* If CHECK CONDITION was sent, sense should	*/
X					fail=TRUE;			/* have been sent to indicate the error source.	*/
X					try_again=FALSE;
X					break;
X
X			case MEDIUM_ERROR:	printf("out of paper");
X						carry_on();
X						break;
X
X			case HARDWARE_ERROR:	printf("ERROR:'hardware error'");
X						fail=TRUE;
X						try_again=FALSE;
X						break;
X
X			case ILLEGAL_REQUEST:	printf("ERROR:'illegal request';Target does not support command or data length");
X						fail=TRUE;
X						try_again=FALSE;
X						break;
X
X			case UNIT_ATTENTION:	printf("printer off line");
X						carry_on();
X						break;
X
X			case ABORTED_COMMAND:	printf("ERROR:'aborted command'");	/* SPC detected an error in phase	*/
X						fail=TRUE;				/* or parity.				*/
X						try_again=FALSE;
X						break;
X
X			default:	printf("ERROR:Target returns illegal sense");
X					fail=TRUE;
X					try_again=FALSE;
X					break;
X		}
X	}
X}
X
X
X/****************************************************************
X*	This function allows the user to decide whether a 	*
X*	print continues after a printer error. This allows	*
X*	the user to correct the error before continuing.	*
X****************************************************************/
X
Xcarry_on()
X{
X	printf("\nDo you wish to continue?");
X	printf("\n\nIf NO then press ESCAPE");
X	printf("\nIf YES then prepare printer and strike a key\n");
X	if (getch() == ESCAPE)
X	{
X		fail=TRUE;
X		try_again=FALSE;
X	}
X	else
X	{
X		try_again=TRUE;
X		while (try_again)
X		{
X			test();
X			status();
X		}
X		if (status == GOOD)
X			try_again = TRUE;
X	}
X}
X
X
X/************************************************
X*	This is called after the SPC has 	*
X*	returned sense following a PRINT. Its	*
X*	purpose is to process the sense data 	*
X*	and return a message to the user.	*
X************************************************/
X
Xmessage()
X{
X	if (jcb_1.status_byte != GOOD)
X	{
X		printf("Sense not returned after print");
X	}
X	else
X	{
X		switch (sense[0])
X		{
X			case NO_SENSE:	printf("Print completed successfully");
X					break;
X
X			case MEDIUM_ERROR:	printf("Out of paper");
X						break;
X
X			case HARDWARE_ERROR:	printf("ERROR:'hardware error'");
X						break;
X
X			case ILLEGAL_REQUEST:	printf("ERROR:'illegal request';Target does not support command or data length");
X						break;
X
X			case UNIT_ATTENTION:	printf("Printer off or off line");
X						break;
X
X			case ABORTED_COMMAND:	printf("ERROR:'aborted command'");	/* SPC detected an error in phase	*/
X						break;					/* or parity.				*/
X
X			default:	printf("Printer returns illegal sense after print");
X					break;
X		}
X	}
X}
SHAR_EOF
chmod 0664 asc/ascrot.lib || echo "restore of asc/ascrot.lib fails"
echo "x - extracting asc/ascstruc.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/ascstruc.lib &&
X/********************************************************
X*	This defines the Job Control Block structure	*
X*	which is passed to the SCSI-PRO software.	*
X********************************************************/
Xstruct jcb
X{
X	unsigned char status_byte;	/* STATUS byte		*/
X	unsigned char target_id;	/* ID number 0-7	*/
X	unsigned char lun_no;		/* LUN number 0-7	*/
X	unsigned char arb;		/* Enable Arbitration? 	*/
X	unsigned char initiator_id;	/* Assert initiators ID on the bus during selection?	*/
X	unsigned char attention;	/* Send IDENTIFY message?	*/
X	unsigned char disconnect;	/* Enable disconnection?	*/
X
X	unsigned char direction;	/* Direction of data transfer	*/
X	unsigned short data_len;	/* Data length in bytes */
X	char far *data_addr;		/* Location of data	*/
X
X	unsigned char cdb_len;		/* Command Descriptor Block (CDB) length	*/
X	unsigned char cdb_0;		/* CDB data		*/
X	unsigned char cdb_1;
X	unsigned char cdb_2;
X	unsigned char cdb_3;
X	unsigned char cdb_4;
X	unsigned char cdb_5;		/* Although the SPC only supports 6 byte	*/
X	unsigned char cdb_6;		/* commands the structure must be defined	*/
X	unsigned char cdb_7;		/* like this for use by the ASC-88.		*/
X	unsigned char cdb_8;
X	unsigned char cdb_9;
X	unsigned char cdb_a;
X	unsigned char cdb_b;
X};
X
Xstruct jcb jcb_1;
Xunion REGS regs;
Xstruct SREGS sregs;
Xunsigned char buffer[BUFFLIM +1];
Xunsigned char sense[SENSE_BYTES];
SHAR_EOF
chmod 0664 asc/ascstruc.lib || echo "restore of asc/ascstruc.lib fails"
echo "x - extracting asc/check.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/check.lib &&
X
Xcheck()
X{
X	switch (jcb_1.status_byte)
X	{
X		case GOOD:	try_again = FALSE;
X				printf("Print has been stopped");
X				break;
X
X		case ARBITRATION_TIMEOUT:	break;
X
X		case BUSY:	break;
X
X		case RESERVATION_CONFLICT:	try_again = FALSE;
X						printf("Other user has reserved printer");
X						break;
X
X		case FAULT:	try_again = FALSE;
X				printf("Cannot find host adaptor");
X				break;
X
X		default:	try_again = FALSE;
X				printf("SPC error");
X				break;
X	}
X}
SHAR_EOF
chmod 0664 asc/check.lib || echo "restore of asc/check.lib fails"
echo "x - extracting asc/constant.h (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/constant.h &&
X/********************************************************
X*	This file lists all status, message, printer	*
X*	commands and sense codes, but only describes 	*
X*	those that are used within this software.ASC.C	*
X*	specific constants are also defined.		*
X********************************************************/
X	  
X/****************************
X*        Status Codes	    *
X****************************/
X
X#define GOOD		0				/* Operation completeted successfully	*/
X#define CHECK_CONDITION	2				/* Valid sense data exists to explain error condition	*/
X#define CONDITION_MET	4
X#define BUSY		8				/* Target can not accept commands, as it is currently processing	*/
X#define INTERMEDIATE_MET		0x10
X#define	INTERMEDIATE_CONDITION_MET	0x14
X#define RESERVATION_CONFLICT		0x18		/* Target is reserved by another initiator	*/
X
X/****************************
X*       Message Codes	    *
X****************************/
X
X#define COMMAND_COMPLETE	0			/* Command has been terminated after valid status returned	*/
X#define EXTENDED_MESSAGE	1
X#define	SAVE_DATA_POINTERS	2
X#define RESTORE_POINTERS	3			/* Prepare to resend previous command, data or message	*/
X#define DISCONNECT		4			/* Target is about to disconnect from initiator	*/
X#define INITIATOR_DETECTED_ERROR	5
X#define ABORT	6					/* Reserving initiator may use this to abort command	*/
X#define MESSAGE_REJECT		7			/* Previously sent message is not compatible	*/
X#define	NO_OPERATION
X#define MESSAGE_PARITY_ERROR	9			/* Parity error occurred during sending of previous message	*/
X#define LINKED_COMMAND_COMPLETE		0xa
X#define LINKED_COMMAND_COMPLETE_FLAG	0xb
X#define	BUS_DEVICE_RESET	0xc			/* Any initiator may use this to reset board	*/
X#define IDENTIFY		0x80			/* This establishes physical path and whether device supports	*/
X							/* more messages than COMMAND COMPLETE				*/
X
X#define EN_DISCON	0x40			/*This is not a message, but is used in identify, to recognise disconnection */
X
X/****************************
X*	  Commands          *
X****************************/
X
X#define TEST_UNIT_READY 0			/* Checks the printer is on, on-line, has paper and not in an error condition	*/	
X#define REQUEST_SENSE	3			/* Retrieves sense data for initiator, after CHECK CONDITION status	*/
X#define FORMAT	4
X#define PRINT	0xa				/* Transfers data to be printed	*/
X#define	SLEW_PRINT	0xb
X#define FLUSH_BUFFER	0x10			/* Resets buffer pointers to clear buffer	*/
X#define INQUIRY	0x12
X#define RECOVER_BUFFERED_DATA	0x14
X#define MODE_SELECT	0x15
X#define RESERVE_UNIT	0x16			/* Reserves unit for use by only one initiator	*/
X#define RELEASE_UNIT	0x17			/* Releases unit so it can be used by any initiator	*/
X#define COPY	0x18
X#define MODE_SENSE	0x1a
X#define STOP_PRINT	0x1b
X#define RECEIVE_DIAGNOSTIC_RESULTS	0x1c
X#define SEND_DIAGNOSTICS	0x1d
X
X/****************************
X*	 Sense Codes        *
X****************************/
X
X#define NO_SENSE 	0			/* No error has occurred	*/
X#define RECOVERED_ERROR	1
X#define NOT_READY	2
X#define MEDIUM_ERROR	3			/* Printer out of paper	*/
X#define HARDWARE_ERROR	4			/* Series harware  error ocurred	*/
X#define ILLEGAL_REQUEST	5			/* Initiator attempted incompatible command	*/
X#define UNIT_ATTENTION	6			/* Printer off, off-line or in error condition	*/ 
X#define DATA_PROTECT	7
X#define BLANK_CHECK	8
X#define COPY_ABORTED	0xa
X#define ABORTED_COMMAND	0xb			/* Target has terminated command due to error (check sense data)	*/
X#define EQUAL	0xc
X#define VOLUME_OVERFLOW	0xd
X#define MISCOMPARE	0xe
X
X
X/****************************
X*	ASC.C Constants	    *
X****************************/
X
X#define TRUE 1
X#define FALSE 0
X#define FORM_FEED 0xc			/* This is the ASCII character to give a form feed	*/
X#define ESCAPE 0x1b			/* This is the ASCII character for an escape	*/
X#define BUFFLIM 0x7ff
X#define SENSE_BYTES 4
X#define ARBITRATION_TIMEOUT 0x85	/* This is a vendor specific status code for the ASC-88	*/
X
X#define FAULT 0xff			/* These constants are used in asccom.lib	*/
X#define TARGET_ID 0			/* This constant contains the ID of the SPC	*/
X#define YES 0xff
X#define NO 0
X#define IN 0
X#define OUT 0xff
X#define SCSI_PRO 0x94
X#define SCSI_BIOS 0x40
SHAR_EOF
chmod 0664 asc/constant.h || echo "restore of asc/constant.h fails"
echo "x - extracting asc/stoprint.c (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/stoprint.c &&
X
X
X#include <dos.h>
X#include <stdio.h>
X#include <constant.h>
X#include <ascstruc.lib>
X#include <asccom.lib>
X
Xchar try_again;
X
Xmain()
X{
X	try_again=TRUE;
X	while (try_again)
X	{
X		flush();
X		check();
X	}
X}
X
X#include <check.lib>
SHAR_EOF
chmod 0664 asc/stoprint.c || echo "restore of asc/stoprint.c fails"
echo "x - extracting asc/util.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > asc/util.lib &&
X/****************************************************************
X*	This routine is called after a status is returned 	*
X*	which is not supported by SPC. This function displays	*
X*	information on the transfer that failed, including 	*
X*	the status. This status can be checked in the ASC-88	*
X*	manual to find the source of error.			*
X****************************************************************/
X
Xputout()
X{
X	short i;
X	printf("\ntarget_id %x",jcb_1.target_id);
X	printf("\ncdb %x %x %x %x %x %x %x %x %x %x %x %x",jcb_1.cdb_0,jcb_1.cdb_1,jcb_1.cdb_2,jcb_1.cdb_3,jcb_1.cdb_4,jcb_1.cdb_5
X,jcb_1.cdb_6,jcb_1.cdb_7,jcb_1.cdb_8,jcb_1.cdb_9,jcb_1.cdb_a,jcb_1.cdb_b);
X	printf("\nstatus %x",jcb_1.status_byte);
X	for (i=0;i<=3;i++)
X		printf("\nsense%x %x",i,sense[i]); 
X}
SHAR_EOF
chmod 0664 asc/util.lib || echo "restore of asc/util.lib fails"
echo "x - extracting spc/arbitrat.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/arbitrat.lib &&
X/************************************************************************
X*									*
X*	disconect():	This disconnects the TARGET from the initiator  *
X*			by sending the DISCONNECT message, releasing    *
X*			busy and restoring the previous initiators	*
X*			identifiers after saving the current initiators.*
X*									*
X************************************************************************/
X
Xdisconect()
X{
X	message=DISCONNECT;
X	messin();				/* If this message is not accepted discon is set FALSE	*/
X	if (discon)
X	{
X		recon=TRUE;		/* This is a flag set to show a reconnection must take place	*/
X		if (com[0] == PRINT)
X			recon_data = (com[4]+(com[3]*256));	/* This is the length of data to be transferred  */
X		else
X			recon_data=FALSE;	/* No data for print buffer	*/
X	} 
X	exchange();
X	reset();
X}
X
X
X/**************************************************************************
X*									  *
X*	reconnect():	This restores the identifiers of the initiator    *
X*			which disconnected, arbitrates for the bus,	  *
X*			on victory reselect the initiator, and 		  *
X*			processes its command.Status is then returned 	  *
X*			and the bus released.If the initiator has	  *
X*			reserved the bus a print command can be executed. *
X*									  *
X**************************************************************************/
X
Xreconnect()
X{
X	if (DP8490)	Earbitrate();
X	else		Narbitrate();
X	re_exchange();
X	stat=GOOD;			/* status will default to this if no errors	*/
X	reselect();
X	message=(IDENTIFY | EN_DISCON);
X	messin();			/* recon can be set FALSE if IDENTIFY message is rejected	*/
X	if (recon)
X	{
X		discon=TRUE;		/* This must be TRUE if a reconnection is taking place	*/
X		if (!fail) process_cmd();
X		recon=FALSE;
X		status();
X		message=COMMAND_COMPLETE;
X		messin();
X	}
X	reset();
X	if (!in_print && print_on && !stat)
X		outbuf();
X	eni();
X}
X
X
X/************************************************************************
X*									*
X*	Narbitrate():	This arbitates for the bus in MODE N, and if	*
X*			defeated will continue arbitrating until the	*
X*			bus is won.					*
X*									*
X************************************************************************/
X
XNarbitrate()
X{
X	no_win=TRUE;
X	while(no_win)
X	{
X		write(EASIMR2,TARGET);	/* Disallow parity during arbitration	*/
X		write(EASIICR,MODE_N);
X		write(EASIODR,SCSIID);
X		poss_sel=FALSE;
X		dsi();
X		RESETA=servn;
X		eni();
X		write(EASIMR2,(EN_ARB | TARGET));
X		while ((!(read(EASIICR) & AIP)) && !poss_sel);
X		RESETA=main;
X		if (poss_sel || (read(EASIICR) & LA) || (read(EASICSD) > SCSIID))
X			write(EASIMR2,TARGET);
X		else
X		{
X			write(EASIICR,AS_SEL);
X			no_win=FALSE;
X		}
X	}
X	RESETA=gen_int;
X}
X
X
X/************************************************************************
X*									*
X*	servn(): Any interrupt that occurs during arbitration is 	*
X*		 treated as a selection, therefore parity checking 	*
X*		 must be enabled and main called.On return from the 	*
X*		 selection the possible selection (poss_sel) must	*
X*		 be set, to allow the software to reenable arbitration. *
X*									*
X************************************************************************/
X
X
Xservn()
X{
X	write(EASIMR2,(TARGET | EN_PINT | EN_PCHK));
X	main();
X	poss_sel=TRUE;
X}
X
X
X
X/************************************************************************
X*									*
X*	Earbitrate():	This arbitrates for the bus in MODE E, and if	*
X*			defeated will continue arbitrating until the	*
X*			bus is won.					*
X*									*
X************************************************************************/
X
XEarbitrate()
X{
X	no_win=TRUE;
X	while(no_win)
X	{
X		write(EASIMR2,TARGET);
X		write(EASIICR,MODE_E);
X		write(EASIODR,SCSIID);
X		dsi();
X		write(EASIEMR,IMR);
X		write(EASIIMR,(MPE | EEDMA | DPHS | APHS | EBSY));
X		ano_interrupt=TRUE;
X		RESETA=serva;
X		write(EASIEMR,EN_EEARB);
X		eni();
X		while (ano_interrupt)
X		{
X			if (front != rear)
X			{
X				printarb();
X				if (front > top)  front=bottom;
X			}
X		}
X		RESETA=main;
X		write(EASIEMR,(ISR | EN_EEARB));
X		if (read(EASIISR) ^ EARB)
X		{
X			write(EASIMR2,(TARGET | EN_PINT | EN_PCHK));	/* Enable parity for use in possible selection	*/
X			main();
X		}
X		else
X		{
X			if ((!(read(EASIICR) & AIP)) || (read(EASIICR) & LA) || (read(EASICSD) > SCSIID))
X			{
X				write(EASIEMR,RPI);	/* Reset interrupt and arbitration bit	*/
X				write(EASIEMR,NO_OP);	/* Take off reset	*/
X			}
X			else
X			{
X			write(EASIICR,AS_SEL);
X			no_win=FALSE;
X			}
X		}
X	}
X	RESETA=gen_int;
X}
X
X/************************************************************************
X*	This function is similar to printit(), in that it outputs a	*
X*	character to the printer. The differences are that this routine *
X*	must monitor for an arbitration interrupt, and must escape	*
X*	the routine on a printer error.					*
X************************************************************************/
X
Xprintarb()
X{
X	if (!(read(PIOB) & PRINTER_ERROR))
X	{
X		while (ano_interrupt && (!(read(PIOB) & PRINTER_BUSY)) && (!(read(PIOB) & PRINTER_ERROR)));
X		if (read(PIOB) & PRINTER_BUSY)
X		{
X			dsi();			/* Interrupts are disabled to prevent a selection which may	*/
X			if (front != rear)	/* change these pointers.					*/
X			{
X				write(PIOA,*front++);
X				eni();
X				write(PIOC, (PRINTER_STROBE | LED_ON));
X				write(PIOC,LED_ON);
X			}
X			eni();
X		}
X	}
X}
X
X/************************************************************************
X*									*
X*	reselect():	This reselects the device that is currently 	*
X*			awaiting reselection.This should be proceeded	*
X*			by re_exchange() which restores the initiators	*
X*			ID and command.					*
X*									*
X************************************************************************/
X
X
Xreselect()
X{
X	int i=0;
X	write(EASISER,FALSE);
X	write(EASIODR,(SCSIID | initid));
X	write(EASITCR,AS_IO);					/* assert I/O to show this is a reselection.	*/
X	if (DP8490)
X	{
X		write(EASIICR,(MODE_E | AS_SEL | AS_DBUS));
X		write(EASIEMR,NO_OP);				/* Reset arbitration bit (set in Earbitrate() )		*/
X	}
X	else
X	{
X		write(EASIICR,(AS_SEL | AS_DBUS));
X		write(EASIMR2,TARGET);				/* Reset arbitration bit ( set in Narbitrate() )	*/
X	}
X	write(EASIMR2,(TARGET | EN_PINT | EN_PCHK)); 
X	while((!(read(EASICSB) & CK_BSY)) && (i++ <= SEL_TIMEOUT));	/* Wait selection time out delay for selection	*/
X	if (!(read(EASICSB) & CK_BSY)) 
X	{
X		write(EASIICR,AS_RST);			/* Selection timeout, so RESET is enabled causing the system to restart */
X	}
X	if (DP8490)
X	{
X		write(EASIICR,(MODE_E | AS_SEL | AS_DBUS | AS_BSY));		/* In reselection busy must be 		 */
X		write(EASIICR,(MODE_E | AS_BSY));				/* asserted before SEL & DBUS deasserted */
X		write(EASIEMR,IMR);
X		write(EASIIMR,(MPE | EEDMA | DPHS | EBSY | ESEL | EARB));	/* Only allow parity or phase mismatch interrupts */
X		write(EASIEMR,RPI);
X		write(EASIEMR,EN_APHS);
X		eni();
X	}
X	else
X	{
X		write(EASIICR,(AS_SEL | AS_DBUS | AS_BSY));	/* In reselection busy must be asserted			*/
X		write(EASIICR,AS_BSY);				/* before SEL & DBUS deasserted				*/
X		eni();
X	}
X}
X
X
X/************************************************************************
X*									*
X*	exchange(): This stores the current initiators identifiers in   *
X*	alternate variables, so they are available during reconnection.	*
X*									*
X************************************************************************/
X
Xexchange()
X{
X	initid_r=initid;
X	for (i=0;i<=(COMMAND_BYTES-1);i++)
X		com_r[i]=com[i];
X}
X
X
X/************************************************************************
X*									*
X*	re_exchange():	This restores the ID and command of the 	*
X*			initiator awaiting reconnection.		*
X*									*
X************************************************************************/
X
Xre_exchange()
X{
X	initid=initid_r;
X	for (i=0;i<=(COMMAND_BYTES-1);i++)
X		com[i]=com_r[i];
X}
X
SHAR_EOF
chmod 0664 spc/arbitrat.lib || echo "restore of spc/arbitrat.lib fails"
echo "x - extracting spc/command.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/command.lib &&
X/*********************************************************************
X*								     *
X*	select(): This routine checks the interrupt on A to ensure   *
X*		  it is a valid selection, and responds by asserting *
X*		  busy.						     *
X*								     *
X*********************************************************************/
X
Xselect()
X{
X	if (DP8490) 
X	{
X		write(EASIEMR,ISR);
X		if ((temp=read(EASIISR)) & ESPER)		error(8);	/* SCSI parity error	*/
X		if (!(temp & ESEL))				error(9);	/* No Selection		*/
X	}
X	else
X	{
X		if ((read(EASIBSR) & BUS_MASK) ^ (INTERRUPT | PHASE_INT))	 error(4);	/* Invalid interrupt	*/  
X		if (!(read(EASICSB) & CK_SEL)) 				 error(5);	/* Interrupt on A while SEL inactive	*/
X	}
X	if (!((temp=read(EASICSD)) & SCSIID)) 		 		 error(6);	/* Interrupt on A with wrong ID on bus	*/
X	if ((IDtest(initid=temp ^ SCSIID)) > 1)
X	{
X		error(7);					/* Selection with more than two bits active on bus	*/
X	}
X	if (DP8490)	write(EASIICR,(AS_BSY | MODE_E));	/* Assert BSY	*/
X	else		write(EASIICR,AS_BSY);
X	while(read(EASICSB) & CK_SEL);				/* Wait for initiator to deassert SEL	*/
X}
X
X
X
X/************************************************************************
X*									*
X*	set_up(): This saves the ID and command of the previous		*
X*		  initiator, enters target mode, sets up the interrupt  *
X*		  response and receives the initiators message, if 	*
X*		  appropriate.The discon flag is set if the initiator	*
X*		  supports disconnection. i.e If it puts its own ID 	*
X*		  onto the bus during selection, and sends an IDENTIFY	*
X*		  message with the disconnection bit enabled.		*
X*									*
X************************************************************************/
X
X
Xset_up()
X{
X	write(EASISER,FALSE);			/* This prevents any possibility of a selection		*/
X	if (DP8490)
X	{
X		write(EASIEMR,IMR);		/* Set up interrupts to only allow phase and SCSI parity interrupts	*/
X		write(EASIIMR,(MPE | EEDMA | DPHS | EBSY | ESEL | EARB));
X		write(EASIEMR,RPI);
X		write(EASIEMR,EN_APHS);
X	}
X	else read(EASIRPI);
X	RESETA=gen_int;
X	intA();
X	stat=GOOD;						/* status defaults to GOOD through program if no errors	*/
X	mescon=FALSE;						/* Set up flag for use in messin, if required.	*/
X	if ((read(EASIBSR) & CK_ATN) &&  !fail)			/* Check if initiator has a message	*/
X	{
X		getmes();
X		messout();
X	}
X	else discon=FALSE;				/* No IDENTIFY message so disconnection impossible	*/
X	if (!initid) discon=FALSE;			/* No initiator ID so disconnection impossible		*/
X
X}
X
X/*********************************************************************
X*                                                                    *
X*	fetch_cmd(): This routine enters the command phase and	     *
X*		     reads in the command block from the initiator   *
X*		     , storing it in the buffer com[6].		     *
X*								     *
X*********************************************************************/
X
Xfetch_cmd()
X{
X	int i;
X	write(EASITCR,COMMAND_OUT);
X	point=&com[0];			/* Set pointer to base of command buffer	*/
X	for (i=0;i<=(COMMAND_BYTES-1);i++)
X	{
X		write(EASITCR,(COMMAND_OUT|REQ));
X		while(!(read(EASIBSR) & CK_ACK));
X		*point++=read(EASICSD);			/* Fill up command buffer	*/
X		write(EASITCR,COMMAND_OUT);
X		while(read(EASIBSR) & CK_ACK);
X	}
X}
X
X/*********************************************************************
X*								     *
X*	status(): This routine enters the status phase and           *
X*                 sends stat.      				     *	
X*								     *
X*********************************************************************/
X
Xstatus()
X{
X	write(EASITCR,STATUS_IN);
X	write(EASIODR,stat);
X	if (DP8490)	write(EASIICR,(AS_BSY | AS_DBUS | MODE_E));
X	else		write(EASIICR,(AS_BSY | AS_DBUS));
X	write(EASITCR,(STATUS_IN | REQ));
X	while(!(read(EASIBSR) & CK_ACK));
X	write(EASITCR,STATUS_IN);
X	if (DP8490)	write(EASIICR,(AS_BSY | MODE_E));
X	else		write(EASIICR,AS_BSY);
X	while(read(EASIBSR) & CK_ACK);
X}
X
X/*********************************************************************
SHAR_EOF
echo "End of part 1"
echo "File spc/command.lib is continued in part 2"
echo "2" > s2_seq_.tmp
exit 0

From owner-pc532%daver@mips.com Wed Feb 21 10:38:22 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: scsi02
Date: 20 Feb 90 22:49:56 PST (Tue)
From: daver@wombat.bungi.COM (Dave Rand)

#!/bin/sh
# this is part 2 of a multipart archive
# do not concatenate these parts, unpack them in order with /bin/sh
# file spc/command.lib continued
#
CurArch=2
if test ! -r s2_seq_.tmp
then echo "Please unpack part 1 first!"
     exit 1; fi
( read Scheck
  if test "$Scheck" != $CurArch
  then echo "Please unpack part $Scheck next!"
       exit 1;
  else exit 0; fi
) < s2_seq_.tmp || exit 1
echo "x - Continuing file spc/command.lib"
sed 's/^X//' << 'SHAR_EOF' >> spc/command.lib
X*								     *
X*	messin(): This routine enters the message in phase and       *
X*	          sends 'message' to the initiator.  		     *
X*								     *
X*********************************************************************/
X
Xmessin()
X{
X	write(EASITCR,MESSAGE_IN);
X	write(EASIODR,message);
X	if (DP8490)	write(EASIICR,(AS_BSY | AS_DBUS | MODE_E));
X	else		write(EASIICR,(AS_BSY|AS_DBUS));
X	write(EASITCR,(MESSAGE_IN|REQ));
X	while(!(read(EASIBSR) & CK_ACK));
X	write(EASITCR,MESSAGE_IN);
X	if (DP8490)	write(EASIICR,(AS_BSY | MODE_E));
X	else		write(EASIICR,AS_BSY);
X	while(read(EASIBSR) & CK_ACK);
X	if ((read(EASIBSR) & CK_ATN) && !mescon)	/* If the initiator detects an error in the message and 	*/
X	{						/* wishes to respond it asserts ATN				*/
X		mescon=TRUE;		/* This stops the program cycling forever between messin & messout on error	*/
X		getmes();
X		messout();
X	}
X}
X
X
X/************************************************************************
X*									*
X*	getmes(): This fetches a message from the initiator.Although	*
X*		  this software only supports a single byte message it  *
X*		  will accept up to 256 bytes.However it will only 	*
X*		  process the first byte.				*
X*									*
X************************************************************************/
X
Xgetmes()
X{
X	int i=0;
X	parity_error=FALSE;
X	write(EASITCR,MESSAGE_OUT);
X	while(((read(EASIBSR) & CK_ATN) || mess_err) && (i<=(MESSAGE_BYTES-1)))	/* mess_err allows the message to be resent	*/
X	{								/* after an error, even though ATN is inactive.		*/
X		mess_err=FALSE;
X		write(EASITCR,(MESSAGE_OUT | REQ));
X		while(!(read(EASIBSR) & CK_ACK));
X		mess_out[i++]=read(EASICSD);
X		write(EASITCR,MESSAGE_OUT);
X		while(read(EASIBSR) & CK_ACK);
X	}
X}
X
X
X/**********************************************************************
X*								      *
X*	messout(): This follows getmes(), processing the command      *
X*		   which getmes returns.If there is a message parity  *
X*		   error it will attempt to recover the error.	      *
X*								      *
X**********************************************************************/
X
Xmessout()
X{
X	if (read(EASIBSR) & CK_ATN)		/* Initiator attempting to send more than 256 message bytes	*/
X	{
X		message=MESSAGE_REJECT;
X		messin();
X		sense[0]=ABORTED_COMMAND;
X		stat=CHECK_CONDITION;
X		fail=TRUE;
X	}
X	else
X	{
X		if (parity_error) 
X		{
X			mess_err=TRUE;
X			getmes();
X			if (!parity_error)
X			{
X				sense[0]=NO_SENSE;	/* On parity error this was set to aborted command and	*/
X				stat=GOOD;		/* check condition, which is now untrue.		*/
X			}
X		}
X		if (!parity_error)
X		{
X			switch (mess_out[0])
X			{
X				case ABORT:	if (initid && (reserved == initid))	/* Only print initiator causes abortion   */
X							restrt();
X						break;
X				case MESSAGE_REJECT:	messin();
X							if (read(EASIBSR) & CK_ATN)	/* Initiator finds fault with message     */
X							{
X								switch (message)	/* Next action depends on message 	*/
X								{			/* target attempted to send		*/
X									case COMMAND_COMPLETE:	break;	/* Not identified as    */
X													/* an error		*/
X									case DISCONNECT:	discon=FALSE;	/* No available   */
X												break;		/* disconnection  */
X
X									case MESSAGE_REJECT:	discon=recon=FALSE;
X												fail=TRUE;
X												sense[0]=HARDWARE_ERROR;
X												stat=CHECK_CONDITION;
X												break;
X
X									case (IDENTIFY | EN_DISCON):	sense[0]=HARDWARE_ERROR;
X													recon=FALSE;
X													fail=TRUE;
X													break;
X
X									default: restrt();  /* Attempted to send illegal message  */
X								}
X							}
X							break;
X
X				case MESSAGE_PARITY_ERROR:	messin();		/* Resend previous message.	*/
X								if (read(EASIBSR) & CK_ATN)
X								{
X									sense[0]=HARDWARE_ERROR;
X									stat=CHECK_CONDITION;
X									fail=TRUE;
X								}
X								break;
X				case BUS_DEVICE_RESET:	restrt();		/* Resets system regardless of message sender	*/
X	
X				case IDENTIFY:	discon=FALSE;		/* Initiator does not support disconnection	*/
X						break;
X				case (IDENTIFY | EN_DISCON):	discon=TRUE;	/* Initiator supports disconnection	*/
X								break;
X				default:	message=MESSAGE_REJECT;
X						messin();
X			}
X		}
X		else
X		{
X			sense[0]=ABORTED_COMMAND;
X			stat=CHECK_CONDITION;
X			fail=TRUE;
X		}
X	}
X	mescon=FALSE;
X}
X
X
X/**********************************************************************
X*								      *
X*	reset(): This sets up the SCSI to wait for the next selection *
X*		 Interrupts are disabled during this routine, so      *
X*		 to avoid missing a selection BSY is not deasserted   *
X*		 until late in the routine.(Thus freeing the bus)     *
X*		 In the DP8490 all interrupts are masked off except   *
X*		 selection and SCSI parity error.(Checks parity	      *
X*		 on selection)					      *
X* 								      *
X**********************************************************************/
X
Xreset()
X{
X	dsi();
X	RESETA=main;
X	write(EASISER,SCSIID);
X	write(EASITCR,FALSE);			/* Deassert all SCSI signals			*/
X	if (DP8490)
X	{
X		write(EASIEMR,RPI);
X		write(EASIEMR,IMR);
X		write(EASIIMR,(EARB | EBSY | APHS | DPHS | EEDMA | MPE));
X		write(EASIICR,MODE_E);
X	}
X	else
X	{
X		read(EASIRPI);
X		write(EASIICR,FALSE);
X	}
X	parity_error=phase_error=fail=FALSE;
X}
X
X
X/********************************************************************
X*								    *
X*	gen_int(): This reponds to an unexpected SCSI interrupt.    *
X*		   resets are handled in machine code, so the only  *
X*		   other relevant general interrupts are parity     *
X*		   errors and phase mismatches.Errors associated    *
X*		   with DMA are handled by DMA routines.On error    *
X*		   the relevant command is not carried out and      *
X*		   sense is set to aborted command.Check condition  *
X*		   is the returned status.			    *
X*								    *
X********************************************************************/
X
Xgen_int()
X{
X	parity_error=phase_error=FALSE;		/* Reset any previous errors	*/
X	if (DP8490)
X	{
X		write(EASIEMR,(ISR | EN_APHS));
X		if ((temp=read(EASIISR)) & ESPER)
X			parity_error=TRUE;
X		if (temp & APHS)
X			phase_error=TRUE;
X		write(EASIEMR,RPI);
X		write(EASIEMR,EN_APHS);
X	}
X	else
X	{
X		if ((temp = read(EASIBSR)) & SPER)
X			parity_error=TRUE;
X		if (!(temp & PHASE_INT))
X			phase_error=TRUE;
X		read(EASIRPI);
X	}
X	if (fail=(parity_error | phase_error))		/* Set fail flag if any errors	*/
X	{
X		sense[0]=ABORTED_COMMAND;
X		stat=CHECK_CONDITION;
X	}
X	RESETA=gen_int;
X	eni();
X}
SHAR_EOF
echo "File spc/command.lib is complete"
chmod 0664 spc/command.lib || echo "restore of spc/command.lib fails"
echo "x - extracting spc/commands.h (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/commands.h &&
X/********************************************************
X*	This file lists all status, message, printer	*
X*	commands and sense codes, but only describes	*
X*	those that are used with this software.		*
X********************************************************/
X	  
X/****************************
X*        Status Codes	    *
X****************************/
X
X#define GOOD		0				/* Operation completeted successfully	*/
X#define CHECK_CONDITION	2				/* Valid sense data exists to explain error condition	*/
X#define CONDITION_MET	4
X#define BUSY		8				/* Target can not accept commands, as it is currently processing	*/
X#define INTERMEDIATE_MET		0x10
X#define	INTERMEDIATE_CONDITION_MET	0x14
X#define RESERVATION_CONFLICT		0x18		/* Target is reserved by another initiator	*/
X
X/****************************
X*       Message Codes	    *
X****************************/
X
X#define COMMAND_COMPLETE	0			/* Command has been terminated after valid status returned	*/
X#define EXTENDED_MESSAGE	1
X#define	SAVE_DATA_POINTERS	2
X#define RESTORE_POINTERS	3			/* Prepare to resend previous command, data or message	*/
X#define DISCONNECT		4			/* Target is about to disconnect from initiator	*/
X#define INITIATOR_DETECTED_ERROR	5
X#define ABORT	6					/* Reserving initiator may use this to abort command	*/
X#define MESSAGE_REJECT		7			/* Previously sent message is not compatible	*/
X#define	NO_OPERATION
X#define MESSAGE_PARITY_ERROR	9			/* Parity error occurred during sending of previous message	*/
X#define LINKED_COMMAND_COMPLETE		0xa
X#define LINKED_COMMAND_COMPLETE_FLAG	0xb
X#define	BUS_DEVICE_RESET	0xc			/* Any initiator may use this to reset board	*/
X#define IDENTIFY		0x80			/* This establishes physical path and whether device supports	*/
X							/* more messages than COMMAND COMPLETE				*/
X
X#define EN_DISCON	0x40			/*This is not a message, but is used in identify, to recognise disconnection */
X
X/****************************
X*	  Commands          *
X****************************/
X
X#define TEST_UNIT_READY 0			/* Checks the printer is on, on-line, has paper and not in an error condition	*/	
X#define REQUEST_SENSE	3			/* Retrieves sense data for initiator, after CHECK CONDITION status	*/
X#define FORMAT	4
X#define PRINT	0xa				/* Transfers data to be printed	*/
X#define	SLEW_PRINT	0xb
X#define FLUSH_BUFFER	0x10			/* Resets buffer pointers to clear buffer	*/
X#define INQUIRY	0x12
X#define RECOVER_BUFFERED_DATA	0x14
X#define MODE_SELECT	0x15
X#define RESERVE_UNIT	0x16			/* Reserves unit for use by only one initiator	*/
X#define RELEASE_UNIT	0x17			/* Releases unit so it can be used by any initiator	*/
X#define COPY	0x18
X#define MODE_SENSE	0x1a
X#define STOP_PRINT	0x1b
X#define RECEIVE_DIAGNOSTIC_RESULTS	0x1c
X#define SEND_DIAGNOSTICS	0x1d
X
X/****************************
X*	 Sense Codes        *
X****************************/
X
X#define NO_SENSE 	0			/* No error has occurred	*/
X#define RECOVERED_ERROR	1
X#define NOT_READY	2
X#define MEDIUM_ERROR	3			/* Printer out of paper	*/
X#define HARDWARE_ERROR	4			/* Series harware  error ocurred	*/
X#define ILLEGAL_REQUEST	5			/* Initiator attempted incompatible command	*/
X#define UNIT_ATTENTION	6			/* Printer off, off-line or in error condition	*/ 
X#define DATA_PROTECT	7
X#define BLANK_CHECK	8
X#define COPY_ABORTED	0xa
X#define ABORTED_COMMAND	0xb			/* Target has terminated command due to error (check sense data)	*/
X#define EQUAL	0xc
X#define VOLUME_OVERFLOW	0xd
X#define MISCOMPARE	0xe
SHAR_EOF
chmod 0664 spc/commands.h || echo "restore of spc/commands.h fails"
echo "x - extracting spc/const.h (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/const.h &&
X /********************************************************************
X*								    *
X*      This File contains the value of constants used in SCSI.C     *
X*								    *
X********************************************************************/
X
X#define	TRUE	1
X#define	FALSE	0
X#define DONT_CARE 0
X#define LED_ON 8
X
X/****************************
X*        SCSI Phases        *
X****************************/
X
X#define	DATA_OUT	0
X#define DATA_IN		1
X#define COMMAND_OUT	2
X#define	STATUS_IN	3
X#define	MESSAGE_OUT	6
X#define	MESSAGE_IN	7
X
X/****************************
X*	Register bits	    *
X****************************/
X
X/*	TCR	*/
X
X#define AS_IO	1
X#define AS_CD	2
X#define AS_MSG	4
X#define REQ	8
X#define CK_EEDMA	0x80
X
X/*	ICR	*/
X
X#define AS_DBUS	1		/* The prefix as_ should be read as assert */
X#define AS_ATN	2
X#define	AS_SEL	4
X#define	AS_BSY	8
X#define AS_ACK	0x10
X#define	LA	0x20
X#define MODE_N	00
X#define MODE_E	0x40
X#define	AIP	0x40
X#define AS_RST	0x80
X
X/*	MR2	*/
X
X#define	EN_ARB		1	/* The prefix EN_ should be read as enable */
X#define	EN_DMA		2
X#define EN_BSYINT	4
X#define EN_EOP		8
X#define EN_PINT		0x10
X#define EN_PCHK		0x20
X#define TARGET		0x40
X#define	EN_BLK		0x80
X
X#define SINGLE_MODE_DMA EN_DMA | EN_EOP | TARGET | EN_PINT | EN_PCHK
X#define BLK_MODE_DMA EN_DMA | EN_EOP | EN_BLK | TARGET | EN_PINT | EN_PCHK
X
X/*	CSB	*/
X
X#define CK_DBP	1		/* The prefix CK_ should be read as check  */
X#define CK_SEL	2
X#define CK_IO	4
X#define CK_CD	8
X#define CK_MSG	0x10
X#define CK_REQ	0x20
X#define CK_BSY  0x40
X#define CK_RST	0x80
X
X/*	BSR	*/
X
X#define CK_ACK	1
X#define CK_ATN	2
X#define BSY_INT 4
X#define PHASE_INT	8
X#define INTERRUPT	0x10
X#define SPER	0x20
X#define	CK_DRQ	0x40
X#define	EDMA	0x80
X
X#define BUS_MASK	0xfc	/* This value can be used to mask off the two SCSI bus bits of the BSR	*/
X
X/****************************
X*	   EMR		    *
X****************************/
X
X#define EN_EEARB	1
X#define NO_OP	0
X#define RPI	2
X#define SDIR	4
X#define ISR	6
X#define IMR	6
X#define LOOP	8
X#define SPOL	0x10
X#define MPOL	0x20
X#define MPEN	0x40
X#define EN_APHS	0x80
X
X/****************************
X*	  ISR & IMR	    *
X****************************/
X
X#define EARB	1
X#define ESEL	2
X#define EBSY	4
X#define APHS	8
X#define DPHS	0x10
X#define EEDMA	0x20
X#define MPE	0x40
X#define ESPER	0x80
X
X/****************************
X*      Printer Signals      *
X****************************/
X
X#define PRINTER_ACK	1
X#define PRINTER_BUSY	2
X#define PRINTER_PE	4
X#define PRINTER_ERROR	8
X
X#define PRINTER_STROBE	1
X#define PRINTER_SELECT	2
X#define PRINTER_INIT	4
X
X/****************************
X*	DMA Signals	    *
X****************************/
X
X#define SINGLE_MODE 0x40
X#define BLOCK_MODE 0x80
X#define WRITE_TRANSFER 4
X#define READ_TRANSFER 8
X#define CHANNEL0 0xe
X
X/****************************	
X*     Data Constants	    *
X****************************/
X
X#define BUFFSZ 0x7800
X#define SEL_TIMEOUT 4673	/* Selection timeout=250ms. So for 2.5Mhz sel_timeout=2921		*/
X				/*			       for 4 Mhz sel_timeout=4673		*/
X#define BUFFLIM 0X800
X#define MAX_SENSE 4
X
X/****************************
X*	Block Sizes	    *
X****************************/
X
X#define COMMAND_BYTES 6
X#define MESSAGE_BYTES 256
X#define SENSE_BYTES 4
SHAR_EOF
chmod 0664 spc/const.h || echo "restore of spc/const.h fails"
echo "x - extracting spc/dma.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/dma.lib &&
X/*************************************************************************
X*							  		 *
X*	single_dma_in(phase): Enters 'phase' and transfers data using    *
X*			      single mode DMA. (Writes to initiator)	 *
X*									 *
X*************************************************************************/
X
Xsingle_dma_in(phase)
Xint phase;
X{
X	int i;
X	write(EASITCR,phase);
X	write(EASIMR2,SINGLE_MODE_DMA);
X	if (DP8490)	write(EASIICR,(AS_BSY | AS_DBUS | MODE_E));
X	else		write(EASIICR,(AS_BSY | AS_DBUS));
X	dma(EASISDS);
X	if (DP8490)	write(EASIICR,(AS_BSY | MODE_E));
X	else		write(EASIICR,AS_BSY);
X}
X
X/************************************************************************
X*									*
X*	blk_dma_in(phase): Enters 'phase' and transfers data using      *
X*			   block mode DMA. (Writes to initiator)	*
X*									*
X************************************************************************/
X
Xblk_dma_in(phase)
Xint phase;
X{
X	write(EASITCR,phase);
X	write(EASIMR2,BLK_MODE_DMA);
X	if (DP8490)	write(EASIICR,(AS_BSY | AS_DBUS | MODE_E));
X	else		write(EASIICR,(AS_BSY | AS_DBUS));
X	dma(EASISDS);
X	if (DP8490)	write(EASIICR,(AS_BSY | MODE_E));
X	else		write(EASIICR,AS_BSY);
X}
X
X/************************************************************************
X*									*
X*	dma(reg): This initiates a DMA transfer and checks for 		*
X*		  successful completion.Type of transfer must be set 	*
X*		  before calling this routine.				*
X*									*
X************************************************************************/
X
Xdma(reg)
Xchar reg;
X{
X	int i;
X	if (DP8490) 
X	{
X		write(EASIEMR,(IMR | EN_APHS));			/* Allow DMA error interrupts	*/
X		write(EASIIMR,(MPE | EBSY | ESEL | EARB));
X	}
X	RESETA=serva;
X	ano_interrupt=TRUE;
X	write(reg,DONT_CARE);
X	while(ano_interrupt);
X	if (DP8490)
X	{
X		write(EASIEMR,(ISR | EN_APHS));
X		if (read(EASIISR) ^ EEDMA)				/* Check only end of DMA interrupt active	*/
X		{
X			sense[0]=ABORTED_COMMAND;
X			stat=CHECK_CONDITION;
X			print_on=FALSE;				/* Reset command to stop print taking place	*/
X		}
X		write(EASIEMR,(IMR | EN_APHS));			/* Reset interrupt mask for general operation	*/
X		write(EASIIMR,(MPE | EEDMA | DPHS | EBSY | ESEL | EARB));
X		RESETA=gen_int;
X		write(EASIMR2,(TARGET | EN_PINT | EN_PCHK));	/* Reset DMA bits	*/
X		write(EASIEMR,RPI);
X		write(EASIEMR,EN_APHS);
X		eni();
X	}
X	else
X	{
X		for(i=1;i<=3;i++)							/* In mode N to decode TRUE end of*/
X			while((read(EASICSB) & CK_REQ) || (read(EASIBSR) & CK_ACK)); 	/* DMA REQ & ACK must be inactive */
X											/* on three succsesive reads.	  */
X		if(!(read(EASIBSR) & EDMA))
X		{
X			sense[0]=ABORTED_COMMAND;
X			stat=CHECK_CONDITION;
X			print_on=FALSE;				/* Reset command to stop print taking place	*/
X		}
X		else
X		{
X			write(EASIMR2,(TARGET | EN_PINT | EN_PCHK));		/* Reset DMA bits	*/
X			gen_int();						/* Check for phase or parity error	*/
X		}
X	}
X}
X
X/************************************************************************
X*									*
X*	serva(): This routine responds to an interrupt during a DMA 	*
X*		 cycle, by resetting the interrupt flag.		*
X*									*
X************************************************************************/
X
Xserva()
X{
X	ano_interrupt=FALSE;
X}
SHAR_EOF
chmod 0664 spc/dma.lib || echo "restore of spc/dma.lib fails"
echo "x - extracting spc/easio.src (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/easio.src &&
X	;****************************************
X	;*	FILENAME:  EASIO.SRC		*
X	;*	VERSION:   1.1			*
X	;*	DATE:	   23-03-88		*
X	;*	APPLICATION: EASI DEMO BOARD    *
X	;*	WRITTEN BY: ANDREW DAVIDSON	*
X	;*		    CMOS LOGIC DESIGN   *
X	;*		    NSUK GREENOCK	*
X	;****************************************
X	;
X	;
X	;**************************************************
X	;*	Assembler routines for use by 'c'	  *
X	;*	First parameters passed in hl, then de,   *
X	;*	then bc then on stack.Data returned in    *
X	;*	accumulator.				  *
X	;**************************************************
X	;
X		cseg
X		INCLUDE PRNSYM.SRC
X	;
X	;**************************************************
X	;*	read(port): This routine reads in the 	  *
X	;*	character at the specified port address   *
X	;*	and passes it back in the accumulator.    *
X	;*      Useage: temp=read(port)                   *
X	;**************************************************
X	;
X		public read
X	read:	ld	c,l
X		in	a,(c)
X		ret
X	;
X	;
X	;**************************************************
X	;*	write(port,data): This routine writes     *
X	;*	'data' to the specified port.No data	  *
X	;*	returned.				  *
X	;*	Usage: write(port,data)			  *
X	;**************************************************
X	;
X		public write
X	write:	ld	c,l
X		out	(c),e
X		ret
X	;
X	;
X	;**************************************************
X	;*	intA(): This routine sets the interrupt   *
X	;*		mask to only allow interrupts on  *
X	;*		A, and enables	interrupts.	  *
X	;**************************************************
X	;
X		public intA
X	intA:	ld	a,8
X		out	(INTMSK),a
X		ei
X		ret
X	;
X	;
X	;**********************************************************************
X	;*	dmawrit(port,data): This routine writes two bytes to a DMA    *
X	;*		   	    register.The port address is stored in hl *
X	;*		   	    and the data in de.			      *
X	;**********************************************************************
X	;
X		public dmawrit
X	dmawrit:ld	c,l
X		out	(c),e
X		out	(c),d
X		ret
X	;
X	;
X	;**********************************************************************
X	;*	dmaread(port): This reads a 16 bit DMA register, the  address *
X	;*		       of which is stored in the hl pair.The data is  *
X	;*		       also transferred back in the hl register       *
X	;**********************************************************************
X	;
X		public dmaread
X	dmaread:ld	c,l
X		in	l,(c)
X		in	h,(c)
X		ret
X	;
X	;
X	;**********************************************************************
X	;*	IDtest(id): The initiators SCSI ID ,passed in the l register, *
X	;*		    is checked to ensure no more than one bit is high.*
X	;*		    the number of high bits is returned in the	      *
X	;*		    accumulator.				      *
X	;*		    						      *
X	;*	Usage: if (IDtest(id) > 1) error();				      *
X	;**********************************************************************
X	;
X		public IDtest
X	IDtest:	push	bc
X		ld	c,00
X		ld	a,l
X		ld	b,08
X	Fin:	rla
X		jr	nc,not1
X		inc	c
X	not1:	djnz	Fin
X		ld	a,c
X		pop	bc
X		ret
X	;
X	;
X	;****************************************************************
X	;*	restrt(): This program is called to reset the board and *
X	;*		  re-run the diagnostics.			*
X	;****************************************************************
X	;
X		extrn Start
X		extrn DP8490
X		public restrt
X	restrt:	out	(DMAMCL),a
X		ld	a,4
X		out	(DMACOM),a		;Master disable
X		xor	a
X		out	(PIOA),a		;Zero printer data bus
X		out	(PIOC),a		;Disable printer signals
X		out	(EASIICR),a		;Set for Mode N
X	resact:	in	a,(EASICSB)		;Wait for reset inactive
X		and	080h
X		jr	nz,resact
X		in	a,(EASIRPI)		;Reset interrupts
X		jp	Start
X	;
X	;
X	;****************************************
X	;*	eni():This enables interrupts	*
X	;****************************************
X	;
X		public eni
X	eni:	ei
X		ret
X	;
X	;
X	;****************************************
X	;*	dsi():This disables interrupts  *
X	;****************************************
X	;
X		public dsi
X	dsi:	di
X		ret
X	;
SHAR_EOF
chmod 0664 spc/easio.src || echo "restore of spc/easio.src fails"
echo "x - extracting spc/easisym.src (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/easisym.src &&
X;**********************************************************
X;*	This File contains the value of constants used in *
X;*	PRINTER.SRC to supply immediate data values.These *
X;*	are written in lower case to distinguish them 	  *
X;*	from the address constants stored in PRNSYM.SRC.  *
X;*							  *
X;**********************************************************
X
Xtrue:	EQU	1
Xfalse:	EQU	0
Xdont_care: EQU	0
Xled_on:	EQU	8
X
X;*****************************
X;*        SCSI Phases        *
X;*****************************
X
Xdata_out:	EQU	0
Xdata_in:	EQU	1
Xcommand_out:	EQU	2
Xstatus_in:	EQU	3
Xmessage_out:	EQU	6
Xmessage_in:	EQU	7
X
X;*****************************
X;*	Register bits	     *
X;*****************************
X
X;*	TCR	*
X
Xas_io:	EQU	1
Xas_cd:	EQU	2
Xas_msg:	EQU	4
Xreq:	EQU	8
Xck_eedma:	EQU	080h
X
X;*	ICR	*
X
Xas_dbus:	EQU	1		;* The prefix as_ should be read as assert *
Xas_atn:	EQU	2
Xas_sel:	EQU	4
Xas_bsy:	EQU	8
Xas_ack:	EQU	010h
Xla:	EQU	020h
Xmode_e:	EQU	040h
Xaip:	EQU	040h
Xas_rst:	EQU	080h
X
X;*	MR2	*
X
Xen_arb:	EQU	1		;* The prefix en_ should be read as enable *
Xen_dma:	EQU	2
Xen_bsyint:	EQU	4
Xen_eop:	EQU	8
Xen_pint:	EQU	010h
Xen_pchk:	EQU	020h
Xtarget:	EQU	040h
Xen_blk:	EQU	080h
X;
Xsingle_mode_dma:EQU 07ah	;* This is the combinations of bits required *
Xblk_mode_dma:	EQU 0fah	;* to carry out these tasks		     *
X;
X
X;*	CSB	*
X
Xck_dbp:	EQU	1		;* The prefix ck_ should be read as check  *
Xck_sel:	EQU	2
Xck_io:	EQU	4
Xck_cd:	EQU	8
Xck_msg:	EQU	010h
Xck_req:	EQU	020h
Xck_bsy: EQU	040h
Xck_rst:	EQU	080h
X
X;*	BSR	*
X
Xck_ack:	EQU	1
Xck_atn:	EQU	2
Xbsy_int:EQU     4
Xphase_int:	EQU	8
Xinterrupt:	EQU	010h
Xsper:	EQU	020h
Xck_drq:	EQU	040h
Xedma:	EQU	080h
X
X;*****************************
X;*	   EMR		     *
X;*****************************
X
Xen_eearb:	EQU	1
Xno_op:	EQU	0
Xrpi:	EQU	2
Xsdir:	EQU	4
Xisr:	EQU	6
Ximr:	EQU	6
Xloop:	EQU	8
Xspol:	EQU	010h
Xmpol:	EQU	020h
Xmpen:	EQU	040h
Xen_aphs:	EQU	080h
X
X;*****************************
X;*	  ISR & IMR	     *
X;*****************************
X
Xearb:	EQU	1
Xesel:	EQU	2
Xebsy:	EQU	4
Xaphs:	EQU	8
Xdphs:	EQU	010h
Xeedma:	EQU	020h
Xmpe:	EQU	040h
Xesper:	EQU	080h
X
X;*****************************
X;*      Printer Signals      *
X;*****************************
X
Xprinter_ack:	EQU	1
Xprinter_busy:	EQU	2
Xprinter_pe:	EQU	4
Xprinter_error:	EQU	8
X
Xprinter_strobe:	EQU	1
Xprinter_select:	EQU	2
Xprinter_init:	EQU	4
X
X;****************************
X;*	DMA Signals	    *
X;****************************
X
Xsingle_mode:	EQU 040h
Xblock_mode:	EQU 080h
Xwrite_transfer:	EQU 4
Xread_transfer:	EQU 8
Xchannel0:	EQU 0eh
X
X;**************************
X;*	Miscellaneous	  *
X;**************************
X
Xjump:	EQU	0c3h
Xtest1:	EQU	054h
Xtest2:	EQU	0aah
X
SHAR_EOF
chmod 0664 spc/easisym.src || echo "restore of spc/easisym.src fails"
echo "x - extracting spc/print.lib (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/print.lib &&
X/************************************************************************
X*									*
X*	print_cmd(): This enters a data out phase and transfers a block *
X*		     of data to memory using block mode DMA.The size of *
X*		     this block has already been determined in 		*
X*		     process_cmd() and is known to be within the 	*
X*		     allowed limits.					*
X*									*
X************************************************************************/
X
Xprint_cmd()
X{
X	print_on=TRUE;				/* Flag to show print routine that data is available	*/
X	if (!previous)				/* The Que must be set up on the first running of the program  */
X	{
X		top=&buffer[BUFFSZ-1];
X		bottom=&buffer[0];
X		front=rear=bottom;
X		previous=TRUE;
X	}
X	data2=data_len;
X	if (rear > ((top-data_len)+1))		/* Incremented to include location rear	*/
X	{
X		data1=(top-rear)+1;		/* Incremented to include location rear	*/
X		data2=data_len-data1;
X		dma_data(data1);
X		rear=bottom;
X	}
X	dma_data(data2);
X	rear=rear+data2;
X	if (rear > top)	rear=bottom;		/* This is incase the DMA fills the que to the top	*/
X}
X
X
X/************************************************************************
X*									*
X*	dma_data(data):	This carries out the print commands DMA receive *
X*			,transferring 'data' bytes of data to the	*
X*			address pointed to by 'rear'.			*
X*									*
X************************************************************************/
X
Xdma_data(data)
Xint data;
X{
X	write(DMAMCL,DONT_CARE);
X	write(DMAMOD, (BLOCK_MODE | WRITE_TRANSFER));
X	write(DMAMSK,CHANNEL0);
X	dmawrit(DMAADD,rear);
X	dmawrit(DMACNT,--data);		/* DMA controller count is one less than the number of bytes transferred	*/
X	write(EASITCR,DATA_OUT);
X	write(EASIMR2,BLK_MODE_DMA);
X	dma(EASISDT);
X}
X
X
X/************************************************************************
X*									*
X*	outbuf(): This routine outputs the entire contents of the queue *
X*		   to the printer, via port B of the PIO. When the 	*
X*		   buffer is empty print_on is set FALSE,to signify 	*
X*		   printing is finished.				*
X*									*
X************************************************************************/
X
Xoutbuf()
X{
X	in_print=TRUE;	
X	eni();				/* Enable interrupt to allow selection	*/
X	while (front != rear)
X	{
X		printit();
X		if (front > top)
X			front=bottom;
X		if (byt_empty() > BUFFLIM)
X			next=TRUE;
X		else
X			next=FALSE;
X		if (recon && (byt_empty() > recon_data))
X			reconnect();
X	}
X	print_on=in_print=FALSE;
X	sense[0]=NO_SENSE;
X}
X
X
X/************************************************************************
X*									*
X*	printit():	This prints out the character at the front of	*
X*			the que, returning a zero if successful, a one  *
X*			if an error occurs.On error the que is flushed. *
X*									*
X************************************************************************/
X
X
Xprintit()
X{
X	while (read(PIOB) & PRINTER_ERROR)
X	{
X		if (!(read(PIOB) & PRINTER_PE))
X			sense[0]=MEDIUM_ERROR;
X		else
X			sense[0]=UNIT_ATTENTION;
X		if (recon)
X			reconnect();
X	}
X	while ((!(read(PIOB) & PRINTER_BUSY)) && (!(read(PIOB) & PRINTER_ERROR)));	/* In case of error occurring while */
X	if (!(read(PIOB) & PRINTER_ERROR))						/* waiting for busy.		    */
X	{
X		if (front != rear)		/* Checked in case printer was in an error condition and queue was flushed  */
X		{
X			write (PIOA,*front++);
X			write (PIOC, (PRINTER_STROBE | LED_ON));
X			write (PIOC,LED_ON);
X		}
X	}
X}
X
X
X/************************************************************************
X*									*
X*	byt_empty():	This returns the number of bytes still to be	*
X*			filled in the que.				*
X*									*
X************************************************************************/
X
Xbyt_empty()
X{
X	if (front < rear) return ((top-rear) + (front-bottom));
X	if (front > rear) return (front-rear);
X	if (front ==rear) return BUFFSZ;
X}
SHAR_EOF
chmod 0664 spc/print.lib || echo "restore of spc/print.lib fails"
echo "x - extracting spc/printer.src (Text)"
sed 's/^X//' << 'SHAR_EOF' > spc/printer.src &&
X        ;*************************************************
X	;*   FILE NAME : PRINTER.SRC                     *
X	;*   VERSION   : 1.1                             *
X	;*   DATE      : 23-03-88                        *
X	;*   APPLICATON: E.A.S.I. DEMO BOARD             *
X	;*   WRITTEN BY: ANDREW DAVIDSON		 *
X	;*		 A.P.D DESIGN			 *
X	;*		 N.S.U.K. GREENOCK		 *
X	;*************************************************
X	;
X	;
X	;
X	;******************************************************************
X	;*	PRINTER.SRC is the diagnostic test program for a SCSI	  *
X	;*	printer controller, which can use either National's	  *
X	;*	DP8490 Enhanced Asynchronous SCSI Interface (E.A.S.I.)    *
X	;*	or the conventional SCSI interface device DP5380.Since 	  *
X	;*	this diagnostic program can detect which device is being  *
X	;*	used either device can be inserted, however only the	  *
X	;*	DP8490 can be given full diagnostic testing as it is the  *
X	;*	only device with a loopback facility.			  *
X	;*	This program carries out the following functions:	  *
X	;*		ROM & RAM check					  *
X	;*		Stack initialisation				  *
X	;*		Set up of interrupt jump table			  *
X	;*		PIO initialisation				  *
X	;*		Reading in of SCSI ID from switches on PIO port	  *
X	;*		DMA test and initialisation for EASI loopback test*
X	;*		If DP5380, test then initialisation to wait for   *
X	;*		selection interrupt.				  *
X	;*		If DP8490, full loopback test, incorporating	  *
X	;*		asserting every SCSI signal and DMA transfer.The  *
X	;*		EASI is then initiialised to wait for a selection *
X	;*		interrupt.					  *
X	;*	This program should be joined with a program written in	  *
X	;*	'C' with public functions 'main', 'intA' and 'restrt'.	  *
X	;******************************************************************
X	;
X	;
X	;******************************************************************
X	;*	This code is assembled using the PARAGON ASMZ80 Cross	  *
X	;*	Assembler and Linking Loader for the Z80/NSC800 	  *
X	;*	Microprocessors (Version 4).The following table shows the *
X	;*	arithmetic operators used, in this software, to determine *
X	;*	immediate values from the constants shown in PRNSYM.SRC   *
X	;*	and EASISYM.SRC.					  *
X	;*								  *
X	;*	;		Comment field.Anything following this is  *
X	;*			considered a comment.			  *
X	;*								  * 
X	;*	+(expression)	The plus sign followed by parenthesis     *
X	;*			indicates to the assembler that an 	  *
X	;*			immediate value must be calculated from   *
X	;*			the expression within the parenthesis.	  *
X	;*								  *
X	;*	+		addition				  *
X	;*	-		subtraction				  *
X	;*	/		division				  *
X	;*	*		multiplication				  *
X	;*	\		logical NOT				  *
X	;*	&		logical AND				  *
X	;*	^		logical OR				  *
X	;*	MOD		modulus					  *
X	;*								  *
X	;******************************************************************
X	;
X	;
X	VERSN:	EQU 11h				;This costant allows the generation of a software
X	;					;version label, which will be stored at address 0002
X		extrn main_			;These are all external routines required by this software,
X		extrn intA			;which must be exist when the program is linked and loaded. 
X		extrn restrt
X	;
X		PUBLIC Start			;These are variables which are generated in this software,
X		PUBLIC DP8490			;but required to be available by external software.
X		PUBLIC SCSIID
X		PUBLIC RESETA
X	;
X		INCLUDE PRNSYM.SRC		;These two file contain the values of all constants used
X		INCLUDE EASISYM.SRC		;in PRINTER.SRC
X	;
X	;
X	;************************************************
X	;*	Start diagnostics by checking ROM.	*
X	;************************************************
X	;
X		cseg				;A code segment is to follow
X		org 	ROMSTT			;Start program at base of EPROM
X	Loc0:	jr	Start			;Jump to start of ROM check
X	Version:db	VERSN			;Version 1.0
X	Start:	di
X		ld	hl,Version		;Read same location in ROM 
X		ld	a,(hl)			;twice and compare values
X		cp	(hl)
X		jr	z,Go_on			;Jump to RAM test
X		halt
X	;
X	;
X	;**********************************************************************
X	;*	Space in RAM has to be set aside for a jump table, a flag,    *
X	;*	storing of the SCSIID and a test address for loopback testing *
X	;*	of the DP8490.						      *
X	;**********************************************************************
X	;
X		dseg				;A data segment is to follow
X		org	1			;Starts one byte up from base of data segment
X	RESETA:	DEFS	2			;Set aside memory space for
X	;					;vectored interrupt response
X	;
X	DP8490:	DEFS	1			;Flag set to 1 when 8490 used (see EASI test)
X	SCSIID:	DEFS	1			;ID is read from switches (see PIO initialization)
X	;					;and stored at this address.
X	TSTBYT:	DEFS	1			;8490 test byte address	 (see DMA test)
X	;
X	;
X	;**********************************************************************
X	;*	An interrupt causes a call to a predetermined location in     *
X	;*	memory, so an interrupt handling routine must reside at this  *
X	;*	address.On interrupt this routine saves the registers then    *
X	;*	calls a jump table residing at the bottom of RAM.This gives   *
X	;*	the run-time program the ability to control how it responds   *
X	;*	to an interrupt depending on what it is currently doing.On    *
X	;*	return from the called function the registers are restored    *
X	;*	and the program returns to the interrupted function.	      *
X	;**********************************************************************
X	;
X	;
X	;**********************************************************************
X	;*	When the EASI interrupts there is an initial test to see if it*
X	;*	is a SCSI reset, as the response to this is always the same   *
X	;*	 i.e. reset the whole system.If it is not a reset, the normal *
X	;*	service routine is followed.				      *
X	;**********************************************************************
X	;
X		cseg
X		org	03ch
X		push	af			;Save all registers
X		push	bc
X		push	de
X		push	hl
X		in	a,(EASIBSR)
X		and	\ck_atn			;Mask off ATN
X		xor	+(interrupt^phase_int)
X		jr	nz,no_rst		;Interrupt flags active so no reset
X		in	a,(EASICSB)
X		and	ck_sel
X		jr	nz,no_rst		;Selection interrupt so no reset
X		in	a,(EASIICR)
X		and	aip
X		jr	nz,no_rst		;Arbitration interrupt so no reset
X		call	restrt			;Valid reset condition
X	no_rst:	call	+(RESETA-1)		;No reset so call jump table
X		pop	hl			;Restore all registers
X		pop	de
X		pop	bc
X		pop	af
X		ret
X	;
X	;
X	;**********************************************************
X	;*			RAM TEST			  *
X	;*	  Read value in memory location, complement it	  *
X	;*	  , write it back then compare with original	  *
X	;*	  value.Clear memory and repeat for every	  *
X	;*	  location in RAM.				  *
X	;**********************************************************
X	;
X	Go_on:	ld	de,RAMLEN		;Number of locations to test
X		ld	hl,RAMSTT		;Pointer to current address
X	Begin:	ld	a,(hl)			
X		cpl				
X		ld	(hl),a			
X		cp	(hl)
X		ld	(hl),00			;Initialise RAM to zero
X		jr	z,Count			
X		halt
X	Count:	inc	hl
X		dec	de
X		ld	a,d
X		or	e
X		jr	nz,Begin
X	;
X	;					;RAM OK
X	;
X	;*******************************************************************
X	;*	Initialise the Stack at the top  of RAM.		   *
X	;*******************************************************************
X	;
X		ld	sp,ROMSTT
X		ld	hl,STKDATA
X		push	hl
X	;
X	;
X	;********************************************************
X	;*	  On interrupt the program will go to the	*
X	;*	  system designated address, which contains	*
X	;*	  a jump to a location in RAM.This routine	*
X	;*	  stores a jump command at that location,	*
X	;*	  leaving the jump address to be programmed	*
X	;*	  later.					*
X	;********************************************************
X	;
X		ld	a,jump
X		ld	hl,+(RESETA-1)
X		ld	(hl),a
X	;
X	;
X	;********************************************************
X	;*		    PIO Initialization			*
X	;*	  Initialise PIO for mode zero, with ports	*
X	;*	  A and C outputs, port B input.The SCSI 	*
X	;*	  ID is read in from  DIL switches on port B.	*
X	;********************************************************
X	;
X	;
X	;	PORT A: OUTPUT TO PRINTER DATA BUS
X	;
X	;	PORT B: INPUT FROM PRINTER CONTROL SIGNALS AND SWITCHES
X	;!-----------------------------------------------------------------------------!
X	;!   PB0  !   PB1  !   PB2  !   PB3  !   PB4  !    PB5   !   PB6    !  PB7     !
X	;!--------!--------!--------!--------!--------!----------!----------!----------!
X	;!   ACK~ !  BUSY  !   PE   ! ERROR~ !        ! ID BIT 0 ! ID BIT 1 ! ID BIT 2 !
X	;!-----------------------------------------------------------------------------!
X	;
X	;
X	;	PORT C: OUTPUT TO PRINTER CONTROL SIGNALS AND TO DRIVE LED
X	;!-----------------------------------------!
X	;!   PC0    !   PC1   !   PC2    !   PC3   !
X	;!----------!---------!----------!---------!
X	;!  STROBE~ !         !   INIT~  ! LED ON  !
X	;!-----------------------------------------!
X	;
X	;
X		xor	a			;Load accumulator with zero
X		out	(PIOMDR),a		;PIO Mode 0
X		out	(PIODDRB),a		;Port B all inputs
X		cpl
X		out	(PIODDRA),a		;Port A all outputs
X		out	(PIODDRC),a		;Port C all outputs
X		;
X		ld	a,+(led_on^printer_init)	;Switch on LED and initialize printer
X		out	(PIOC),a
X		xor	a
X		out	(PIOA),a		;Fill output buffer with 0
X		ld	a,led_on
X		out	(PIOC),a		;End printer initialisation
X		;
X		in	a,(PIOB)		;Read D.I.L. switches 
X		or	1fh			;Mask off all but SCSI ID
X		cpl
X		rlca				;Rotate ID from top three 
X		rlca				;bits to bottom three.
X		rlca
X		ld	b,a			;binary number to bit pattern.
X		inc	b
X		ld	a,80h			;The ID is used as a counter, 
X	Shift:	rlca				;loaded in b, to move the ID
X		djnz	Shift			;bit to the correct position.
X		ld	(SCSIID),a		;To allow for ID=0 the counter
X	;					;is initially incremented and
X	;					;the ID set at 7.
X	;
X	;
X	;****************************************************************
X	;*	  		    DMA TEST				*
X	;*	  To test the DMA a value (TSTBYT) is written to the	*
X	;*	  address register and read back. (This value is the    *
X	;*	  address the DMA transfer is made to, in the EASI 	*
X	;*	  loopback test) The DMA is initialised for a one byte  *
X	;*	  block mode transfer.					*
X	;*	  Although the other channels are not used A.M.D.	*
X	;*	  suggest the mode registers are initialised to a valid *
X	;*	  condition.						*
X	;****************************************************************
X	;
X	Dmatest:xor	a			
X		out	(DMAMCL),a		;Clear all registers in device
X	;
X		ld	a,+(block_mode^write_transfer)
X		out	(DMAMOD),a
X		inc	a
X		out	(DMAMOD),a		;Fill all mode registers with
X		inc	a			;valid data. A.M.D. suggest
X		out	(DMAMOD),a		;that if this is not done
X		inc	a			;errors may occur.
X		out	(DMAMOD),a
X	;
X		ld	a,channel0		;Mask off all channels except 0
X		out	(DMAMSK),a		;by masking off any incoming DRQ
X	;
X		xor	a
X		out	(DMACNT),a		;Load count with 0 to
X		out	(DMACNT),a		;transfer 1 byte.
X	;
X		ld	hl,TSTBYT		;Load test byte address
SHAR_EOF
echo "End of part 2"
echo "File spc/printer.src is continued in part 3"
echo "3" > s2_seq_.tmp
exit 0

From owner-pc532%daver@mips.com Wed Feb 21 13:43:12 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: re: Sample SCSI driver code
Date: 21 Feb 90 10:13:25 MEZ (Wed)
From: jkh@meepmeep.pcs.com (Jordan K. Hubbard)

If you've got an Amiga, there's a sample SCSI driver available for it
on Fish Disk #181. I can also send it to you.

					Jordan

From owner-pc532%daver@mips.com Wed Feb 21 20:04:03 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
Date: Wed, 21 Feb 90 16:29 PST
From: dlr@daver.bungi.com (Dave Rand)
To: pc532@daver.uu.net
Subject: Entertaining Conversation

I had a couple of entertaining conversations this afternoon. The first was a
very nice lady at the department of Commerce (+1 714 660-0144). Turns out
that we qualify for a "GLV" license for export! This means that so long as
the value of the goods is less than $5,000 USD, we need not deal with
individual license applications. Even though this is "high technology",
there is no problem.

The second was with John Olsen at National Semiconductor, with regard to
Unix licensing. It is too early to tell, but it looks promising.  More as it
comes.

The first of the boards have been shipped. Within the US, we will be using
UPS Blue (Second Day Air). This is costing around $8 per box (boxes are just
over 1 kg, about 3 lbs). Boxes to Canada (hi folks!) will go via UPS ground.
For other countries, we would prefer to use UPS (United Parcel Service) air,
and they are quoting a 3-4 day delivery. If you have any serious objection
to this, please let me know.

Dave Rand
+1 408 434-0600 X4555 work
+1 408 733-4125 home

From owner-pc532%daver@mips.com Thu Feb 22 14:50:34 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
From: dlr@daver.bungi.com (Dave Rand)
Date: Thu, 22 Feb 90 11:42:53 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.bungi.com
Subject: Re: BSD and 32000

[In the message entitled "BSD and 32000" on Feb 20,  3:27, Ken Seefried iii writes:]
> 
> -- How many people on the list have valid BSD licenses?

I think the issue here is how many people have valid BSD licenses that they
can use personally. Unless you have a site license, and you intend to run
the pc532 "on site", you will be in violation of your license agreement if
you run it on the pc532. As well, if you currently hold any Unix binary
license prior to V.3.2 (V.3.1 if it is a NSC product), you may only run the
license on a single CPU. You were licensed for a specific serial number, and
that is all you may run on. Even if there is no possibility that both CPUs
may be running Unix at the same time, you must obtain a current, valid
license for each CPU.

V.3.2 (V.3.1 for NSC) has a "shink-wrap" license agreement that states, in
essence, that you may run THAT COPY of Unix on a single CPU. It does
specifically allow you to move the license between CPUs, but at no time may
you run one copy of Unix on two CPUs (unless so licensed). Further, you may
not use one license to cover another binary.

Further, if your site has source, you must pay a license fee if you intend
to allow the source code to reside on more than one CPU. Each CPU must be
licensed by serial number, although the license fee is small (about $2,000).
At no time may the source code reside on a machine that is not licensed for
it. If you have the appropriate license, you may move the source onto the
pc532.

> 
> -- What sort of nightmare is involved in distributing:
>         a) source to current licenses
>         b) binaries to non-licenses
> 

Source may be transferred between parties with "like" licenses. Source
diffs, while they have not been challanged, remain a "safe" mechanism for
exchanging modifications to Unix.

You may not provide source code (ie. the full source, not diffs) to those who
do not have a "like" license. Having a V.2 binary license does not entitle
you to get the source code :-)

Binaries may be distributed under the terms of a binary distribution license.
Essentially, you provide the binaries, charge a fee, report & remit the
appropriate license fee to your vendor. For V.2, this is about $100-250.
For V.3.2 it is a little less. This depends a lot on the volume. Having
a source license does not entitle you to sell binaries, unless that is
a specific provision in your license. Most universities have a restricted
license that does not entitle them to sell binaries.

The bottom line is that you must purchase a valid Unix license for the
pc532. Your current license will not cover it, unless you are running
it on site and your license specifically permits it.

Licensing is a tricky issue. Don't take chances - talk to someone that
knows. The information above came from my Unix licenses (end user and
binary redistribution), and from John Olsen, who does Unix licensing for
National Semiconductor. 

For more information, you can try 800-828-UNIX. Sorry, I don't have a direct
number for people overseas.


BTW - Unix in the above text should be UNIX, and UNIX is a registered
trademark of AT&T.


-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr@daver.bungi.com

From owner-pc532%daver@mips.com Thu Feb 22 17:50:39 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
Date: Thu, 22 Feb 90 13:02:16 PST
X-Mailer: Mail User's Shell (6.5 4/17/89)
From: gs@vw25.chips.com (George Scolaro)
To: pc532@daver
Subject: Assembly Hints...

Hi folks,
	well now that we have actually started sending out the kits, I
suppose I need to clarify some of the points in the assembly process.

1) The IBM power connector that is in the kit will not fit in the holes that
are drilled on the pcb (arrggh). You will need to file the board side of the
contacts (on THE CONNECTOR) a bit. Also, the connector solders in such that
the open side of the connector (the pins) face towards the power supply
(i.e. outwards).

2) The resistor packs (single in line) all have a dot or some form of
identification regarding pin 1. This is really only important for the 1K  6
pin package, but it is 'nicer' to have them all pointing the right way.  The
silkscreen on the PCB indicates pin 1 by an arrow shaped legend.  For people
that can't read the resistor packs, 220 = (22) 22 x 10^0 ohms, 221 = (220)
22 x 10^1 ohms or 181 = (180) 18 x 10^1, 510 = (51) 51 x 10^0.  Some kits
will have 180 ohm and some 220 ohm resistors for the LEDs, don't panic,
either will work fine. Also, the schematics show 47 ohm resistors for some
of the memory damping resistors, we couldn't get them, but we did get 51 ohm
(which work just as well).

3) The SCSI 1A fuses are either a sickly Green or white in colour.

4) The 56pF caps for the clock lines are bright green.

5) Please socket at least the EPROM, the PALs/GALs and the RS232
driver/receiver chips (and of course all the other devices that have sockets
supplied in the kit).

6) People that are receiving SIMM memory devices from Benjamin (packaged into
the kit) please note that you need to (potentially) trim the edges of them if
they are not 'smooth'. What I mean here is the left and right edge of the
SIMM not the top or bottom. The reason is that some of them had some 'burr'
>From when the PCBs were cut and they are a *real* snug fit for the SIMM
sockets that are in the kit (Augat brand). So, if you notice that the edge
of the SIMMs are not 'smooth' carefully run a sharp EXACTO knife etc. along
the edge.

7) With regard to 6) you will find that it is apparently impossible to
insert the SIMMs from Benjamin (and possibly other manufacturers as well,
though we have some from Convergent that seemed to work very well) into the
SIMM sockets. Don't panic, it really is possible to put them in, it just
doesn't seem like it initially. You will find that the outside rams on the
SIMM package will actually tightly rub on the SIMM socket in front of the
SIMM socket that you are trying to insert the SIMM into (except for the
front socket of course...). Just be persistent (and *gentle*) and you will
find that it will 'jiggle' in. Just pretend that it is one of those nasty
puzzles that people leave laying innocently on coffee tables for unsuspecting
guests to stumble across!

Well, that's about it for now, I'm sure more will follow as people start
putting their kits together...

regards,

-- 
George Scolaro
(try (pyramid|hoptoad|sun|vsi1)daver!vw25.chips.com!gs)

From daver!dlr@uunet.UU.NET Fri Feb 23 02:26:03 1990
Flags: 000000000000
Date: Thu, 22 Feb 90 22:49 PST
From: dlr@daver.bungi.com (Dave Rand)
To: RGREENEB@RICEVM1.RICE.EDU, jpenny@s.ms.uky.edu,
        mips!gatech.edu!mm!ken@uunet.UU.NET, taylor@think.com,
        uunet!bu-it.bu.edu!budd@uunet.UU.NET,
        uunet!equi.com!John.J.Ackley@uunet.UU.NET,
        uunet!ladc.bull.com!Mark-Geisert@uunet.UU.NET,
        uunet!zeus.unomaha.edu!tdavis@uunet.UU.NET
Subject: Your kits

We finished packing your kits a few minutes ago, and they will leave via
UPS Blue (Second day air) tommorow morning. You should have them Monday
Morning.

Dave & George

From owner-pc532%daver@mips.com Sat Feb 24 20:51:31 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
From: Per Holmer  <per@farkas.math.kth.se>
Subject: Re: BSD and 32000
To: pc532@daver.bungi.com
Date: Sat, 24 Feb 90 23:58:11 MET DST
X-Mailer: ELM [version 2.2 PL8]


> 
> -- How many people on the list have valid BSD licenses?
> 

We have BSD and SYSV3.0 source licenses.

Yesterday we received a tape from University of Toronto with their
BSD port for the NS32000. I haven't had much time to look in to it yet but
since they have it up and running on a number of different machines it
will hopefully not be impossible to port...

If we get it to work on the pc532 we're of course willing to distribute
it to people with apropriate licenses.

regards,

stymne@nada.kth.se (Patrik Stymne)
per@farkas.math.kth.se (Per Holmer)


From owner-pc532%daver@mips.com Sun Feb 25 12:32:35 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
From: george@wombat (George Scolaro)
Date: Sun, 25 Feb 90 09:14:48 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver
Subject: more build info...

[In the message entitled "pc532 kit" on Feb 24, 21:25, John L. Connin writes:]

This message was directed to me, but I felt the information would be important
for all kit constructors....

> The board component layout drawing indicates 4 groups of tantalum 
> capacitors which I previously had assumed were 0.1 uf mono caps.
> I can not locate these on the BOM.  Question:

True, these were not in the original schematics (hence BOM). I added them
for bulk capacitance. Desmond Young recommended some bulk capacitance near
the scsi chip(s) due to the large switching currents while driving the SCSI
cables. And I felt some near the CPU/FPU etc was probably a good idea too,
even though the original (all working) PC532 rev 1A boards never had them.

>   1)  What is the value of these tantalum capactors.

Sorry, I neglected to mention the values, anything from 33uf to 100uf at 10V
or better will be adequate.

>   2)  Can I always assume the left-hand side of silk-screen designator
>       is positive, ie:
> 
>           +---------+
>           | o CAP o |
>           +---------+    
>             ^
>             |
>             +---- Positive side.

No. But you can assume that any capacitor straight above or below an IC or
DIP resistor pack has +ve adjacent to pin 14/16/20,24 or 40 of that device.
The safest approach is to buzz the capacitor pin with an ohm-meter to verify
which side is +ve. NOTE: you'll know if you have any tantalums back to
front, they indicate their displeasure with a very impressive 'pop'!

> Oh, another question: What do you use to clean off the solder resin ??
> Conversely, what chemicals should NOT be used to clean off solder
> resin ??

It depends on the solder type, there is a neat water soluble resin that a
friend of mine uses, but I haven't found it yet. So, I use normal Ersin
solder etc. I generally use an aerosol flux remover, my preferred brand is
RAWN #11010.  BUT, be careful:

a) It will damage SOME plastics (none on the PC532), such as the silkscreen
legend on keyboards, oscilloscope front panels :-). I recommend you clean
the board off outside away from plastics, use liberally.

b) Try not to get it on your hands (difficult) since it will remove skin oils.
I generally use a good hand cream after using it.

> In my previous message tonight I forgot to mention my construction
> progress.
> 
> At this point I have everything assembled (ie. soldered) with the
> exception of the tantalum caps I mentioned in the previous message
> and the discrete resistors and two other capacitors (C75,C77).
> In Heathkit parlance, looks like a three evening kit to assemble
> (solder only).
> 
> Everything has gone very smoothly thanks to you and Dave.  I did one
> thing which you might want to pass along -- socket F1 and F2.  To form
> the socket I just remove 4 socket pins from an extra machine pin IC socket.
> 
> Oh yes, another question..  Is the value of C75 and C77 critical ??
> For example, can C77 be changed to 10pf ??  My recollection is that
> the local surplus house did not have any 5pf caps.

Actually the values depend on the type of DUART we sent you. Since we
couldn't get enough of one, some people will get SCN2681's and some
SCN2692's.

For SCN2681's

	C75 = C77 = 5pF. (Signetics says that C77 can be 10-15pF, but C75
			  must be 5pF).

For SCN2692's

	C75 = C77 = 24pF.

My past experience with these caps (on the SCN2681) is that if you set them
both to 10pF then the oscillator (in the DUART) will not reliably turn on.
In fact the data sheet says if you have 15pF (including stray PCB
capacitance) then you will get intermittent power-on problems (I can account
for that). I have seen the oscillator go into relaxation mode, i.e.
oscillating at a frequency much below the crystal frequency.  So, I
recommend you stick to the above values.

best regards,

-- 
George Scolaro
george@wombat
(try {pyramid|sun|vsi1|killer} !daver!wombat!george) [37 20 51 N / 122 03 07 W]

From owner-pc532%daver@mips.com Sun Feb 25 21:09:34 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
From: bobm%convex%uunet@daver (Bob Miller)
X-Quote-Of-The: Scotty: Captain, we din' can reference it!
                Kirk:   Analysis, Mr. Spock?
                Spock:  Captain, it doesn't appear in the symbol table.
                Kirk:   Then it's of external origin?
                Spock:  Affirmative.
                Kirk:   Mr. Sulu, go to pass two.
                Sulu:   Aye aye, sir, going to pass two.
                                        -- 4.3 BSD fortune program
X-Gnat-State: Grummet
To: pc532@daver.bungi.com
Subject: news and questions
Date: Sun, 25 Feb 90 03:12:25 CST

Loeliger's kit arrived yesterday.  Now it's about half soldered.

We've got some questions, of course.

Can a program do 16 bit word accesses to the 16 bit registers on the
ICU?  I can't see any reason why it wouldn't work, but...

What waveform (pulse or square) and frequency should the ICU be
generating for the RFRQ signal?

I don't see any reason why one ICU counter is better than the other
for driving RFRQ.  Which one does the EPROM use?

Is there a variety of AT power supplies or is that a standardized
thing?  Anything we need to look out for in buying the supply?

Thanks.

					K<bob>

From owner-pc532%daver@mips.com Sun Feb 25 22:09:22 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
Date: Sun, 25 Feb 90 18:56 PST
From: dlr@daver.bungi.com (Dave Rand)
To: pc532@daver.bungi.com
Subject: New orders now being taken

For those of you that missed out, here is a second chance. We will be
doing another run of pc532's in the coming month. The price will be
$200 USD per board, although we may change that depending on demand.
No kits of parts will be made available (sorry), and I can't promise
any special pricing on the CPU/FPU/ICU combination, although I will
try.

If you are interested, please mail your request to:

pc-order@daver.bungi.com -or- {sun|mips|pyramid|vsi1|uunet}!daver!pc-order

*PLEASE*! Include your Name, *ADDRESS*, telephone number, and
quantity desired. Also, please include your address. And, if it
is not too much trouble, your address. That is, please include the
address you would like the board shipped to.

(too many people didn't include their address on the last go-around)

We anticipate doing a run of about 20-30 boards, based on the response
we have seen so far. I figure with 100 or so people having boards, one
of us is *bound* to come up with some useful applications!

On other topics, I am in the midst of negotiations on a couple of
quite wizzy software-type things - I hope to have everything firmed
up next week. More information as it happens...

Dave Rand / George Scolaro
941 Chehalis Drive
Sunnyvale, CA  94087

+1 408 434-0600 X4555 work
+1 408 733-4125 home

From owner-pc532%daver@mips.com Mon Feb 26 00:43:20 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
From: george@wombat (George Scolaro)
Date: Sun, 25 Feb 90 21:07:14 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.bungi.com
Subject: Re: news and questions

[In the message entitled "news and questions" on Feb 25,  3:12, Bob Miller writes:]
> Loeliger's kit arrived yesterday.  Now it's about half soldered.
> 
> We've got some questions, of course.
> 
> Can a program do 16 bit word accesses to the 16 bit registers on the
> ICU?  I can't see any reason why it wouldn't work, but...

No problem. The ICU is dynamically bus sized (as are all other 8 bit devices
on the PC532), so a 16 bit write will split up as two consecutive 8 bit
writes (with incrementing address).

> What waveform (pulse or square) and frequency should the ICU be
> generating for the RFRQ signal?

The output should look like a square wave, of period roughly 30.4 useconds,
or whatever the software programmed up in fact. The DRAMC pal performs two
refresh accesses for every RFRQ assertion, i.e. the DRAM devices are
refreshed every 15.2 useconds.

> I don't see any reason why one ICU counter is better than the other
> for driving RFRQ.  Which one does the EPROM use?

Either timer is ok, BUT unix tends to favour one, so we should standardize
on the one that we are currently using (whatever that is - Dave problem...).

> Is there a variety of AT power supplies or is that a standardized
> thing?  Anything we need to look out for in buying the supply?

Nope, normal AT powersupply is just fine. We are pin compatible and connector
compatible with AT powersupplies. The PC532 does not use the power good
signal, but all others (except for -5V) are used.

regards,

-- 
George Scolaro
george@wombat
(try {pyramid|sun|vsi1|killer} !daver!wombat!george) [37 20 51 N / 122 03 07 W]

From owner-pc532%daver@mips.com Mon Feb 26 02:33:53 1990
Flags: 000000000000
Reply-To: pc532@daver.bungi.com
From: dlr@daver.bungi.com (Dave Rand)
Date: Sun, 25 Feb 90 23:29:30 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver.bungi.com, pavel@dgp.toronto.edu
Subject: Re: New orders now being taken

[In the message entitled "Re: New orders now being taken" on Feb 26,  0:44, Pavel Rozalski writes:]
> I'm may be interested in a kit form of the second PC run. I'm really
> keen on getting the discounted CPU set.

Sorry, there will be no kit forms offered. Just the boards. Putting together
the kits has been a major drain on time & energy. (to say nothing of the
boxing up of kits, making sure we didn't forget anything, filling out paper
work with 5 copies for overseas people, buying boxes, obtaining the 5th
large green plastic bag of those little styrofoam peanuts for packing,
trying to wangle all the software deals, waiting on hold for 30 minutes
only to find out the supplier never heard about a 532 socket, etc, etc,
etc.)

If anyone else would like to step forward to try the next run... :-)



-- 
Dave Rand
{pyramid|hoptoad|sun|vsi1}!daver!dlr	Internet: dlr@daver.bungi.com

From owner-pc532%daver@mips.com Tue Feb 27 01:52:21 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
To: pc532@daver.bungi.com
Subject: No Ram Monitor hex file
Date: 26 Feb 90 21:20:46 PST (Mon)
From: daver@wombat.bungi.COM (Dave Rand)

:100000006DA60AF07DA1000917A0FFFFFE0014A253
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From owner-pc532%daver@mips.com Tue Feb 27 01:55:52 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
From: george@wombat (George Scolaro)
Date: Mon, 26 Feb 90 21:45:18 PST
X-Mailer: Mail User's Shell (7.0.1 12/13/89)
To: pc532@daver
Subject: another won

Well, Mr John Connin just got off the phone, sounding pleased and happy
having got his PC532 running.

The IMPORTANT thing to note is that when assembling your PC532 you MUST make
sure that the 32532 is SEATED all the way into the socket. You will observe
that the 32532 (and the 32381) have little rings of metal on four of the
pins near outside corners of the chips. When seating the 32532 and the 32381
these rings should be in contact with the socket, i.e. keep pushing on the
chips until they seat down to the level of the rings. Hint, the gap between
the chips and their respective socket should be around a millimetre or less.
Doing this for the 32381 is pretty easy (it only has 68 pins) BUT for the
32532 a lot of pressure needs to be applied. The way I did this is to place
the board (with the socket already soldered in) on a flat table at around 1
metre off the ground, then while standing (on the floor, not on the board!),
placing the palm of my hand down on the 32532 and then applying as much
force as necessary to push the chip firmly down (it takes quite a lot).

If you have already soldered the capacitor under the 32532 socket it might
pay to ensure you don't crush it by placing a couple of pieces of wood etc
under the 32532, but spaced to protect the capacitor.

Slack Dave has just posted a RAMless monitor for the PC532. This is for the
folks that want to get the boards doing something even though they might not
have any DRAM, or for the folks that are having trouble debugging their
PC532 and suspect memory problems (hopefully there wont be any of those!).
The file is in Intel Hex format and programs into a 27256, it is 4K in
length. The monitor is the mostly brain damaged NS monitor that interfaces
to the NS debug environment, hence it is not very (read yuk) user friendly
in the direct interface mode. To use the monitor perform the following
magic incantations:

1. Remove the PARITY pal (U20).
2. Insert the programmed EPROM.
3. Ensure parity etc. on you host machine is set to 8 bits, no parity, 1 stop,
9600 baud.
4. Turn on and it will say the following:
	R VERSION_2.00 (2681) 04 Nov 1987
5. Type ! then carriage return
6. The message will be as before except an '*' will appear over the R.
7. Type the following:
OMN=3C
8. Now you can dump memory and other things that we don't really want to 
mention until someone really needs them.
9. To dump memory type:
D start length			(in HEX).


Note also: The monitor shipped with the pc532 (Bruce's) requires:
9600 baud, 8 bit, 1 stop, no parity. (John C. figured that out himself!).
Dave has permission to post the sources of the monitor by Bruce. He'll do
that as soon as we stabilize it, i.e. get some more features into it.

best regards,

-- 
George Scolaro
george@wombat
(try {pyramid|sun|vsi1|killer} !daver!wombat!george) [37 20 51 N / 122 03 07 W]

From owner-pc532%daver@mips.com Tue Feb 27 06:18:27 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
Date: Mon, 26 Feb 90 09:33:54 pst
From: Bruce Culbertson <culberts@hplwbc.hpl.hp.com>
To: pc532@daver.bungi.com
Subject: Re:  Sample SCSI driver code, anyone?

Hello Jerry,

> I've been looking at the full SCSI spec and trying to picture just what
> hoops I'm going to have to jump through to implement it for the floppy

In my Minix driver, I only use the SCSI commands READ, WRITE, and
REQUEST SENSE.  I really think for your (our) purposes, that should
just about do it -- it certainly is enough to get started.

I am sending along my SCSI driver.  As you read it, you may sense the
frustration I felt writing it.  I found the both the 5380 and my
32203 DMA controller rather difficult to work with.  The 5380, for
example, has several "features" which are not mentioned in the
documentation I have.  Some control register bits can only be set
when the 5380 is already in a certain state -- a fact that lead me
to conclude my 5380 was busted until I bought another with the
same problem.  Anyway, you will see lots of debugging stuff in the
code.

Good luck,
Bruce
--------------------------------------------------------------------------

# This is a shell archive.  Remove anything before this line,
# then unpack it by saving it in a file and typing "sh file".
#
# Wrapped by Bruce Culbertson <culberts@hplwbc> on Mon Feb 26 09:33:15 1990
#
# This archive contains:
#	scsi.c		scsi_hd.c	
#

LANG=""; export LANG
PATH=/bin:/usr/bin:$PATH; export PATH

echo x - scsi.c
cat >scsi.c <<'@EOF'
/****************************************************************************
 * NS32K Minix SCSI driver
 * Bruce Culbertson
 * 18 Jun 1989
 *
 * Modifications
 *   10 Oct 1989 WBC
 *     Added kludge to prevent a crash caused by a race in the SCSI/DMA
 *     hardware handshake.  Create a watch dog timer with clock task.
 *     When time runs out, set error flag and read/write SCSI data port
 *     which un-hangs handshake.
 ****************************************************************************/
#include "../h/const.h"
#include "../h/com.h"
#include "../h/error.h"
#include "../h/type.h"
#include "../h/32k.h"
#include "glo.h"

#undef	PRIVATE
#define	PRIVATE

/* SCSI bus phases
 */
#define PH_ODATA	0
#define PH_IDATA	1
#define PH_CMD		2
#define PH_STAT		3
#define PH_IMSG		7
#define PH_NONE		8
#define PH_IN(phase)	((phase) & 1)

/* NCR5380 SCSI controller registers
 */
#define SC_CTL		0xfff600	/* base for control registers */
#define SC_DMA		0xfff800	/* base for data registers */
#define SC_CURDATA	SC_CTL+0
#define SC_OUTDATA	SC_CTL+0
#define SC_ICMD		SC_CTL+2
#define SC_MODE		SC_CTL+4
#define SC_TCMD		SC_CTL+6
#define SC_STAT1	SC_CTL+8
#define SC_STAT2	SC_CTL+10
#define SC_START_SEND	SC_CTL+10
#define SC_INDATA	SC_CTL+12
#define SC_RESETIP	SC_CTL+14
#define SC_START_RCV	SC_CTL+14

/* Bits in NCR5380 registers
 */
#define SC_A_RST	0x80
#define SC_A_SEL	0x04
#define SC_S_SEL	0x02
#define SC_S_REQ	0x20
#define SC_S_BSY	0x40
#define SC_S_BSYERR	0x04
#define SC_S_PHASE	0x08
#define SC_S_IRQ	0x10
#define SC_M_DMA	0x02
#define SC_M_BSY	0x04
#define SC_ENABLE_DB	0x01

/* Status of interrupt routine, returned in m1_i1 field of message.
 */
#define ISR_NOTDONE	0
#define ISR_OK		1
#define ISR_BSYERR	2
#define ISR_RSTERR	3
#define ISR_BADPHASE	4

/* Miscellaneous
 */
#define MAX_WAIT	500000
#define IMASK_MSB	22
#define SC_ARM_INT() 	(RD_ADR(ICU_ADR + IMASK_MSB) &= ~(1<<(IR_SCSI-8)))
#define SC_DISARM_INT() (RD_ADR(ICU_ADR + IMASK_MSB) |= (1<<(IR_SCSI-8)))
#define printf		printk
#define SC_LOG_LEN	32

PRIVATE struct scsi_args	*sc_ptrs;
PRIVATE char			sc_reset_done;
PRIVATE char			sc_have_msg;
PRIVATE unsigned char		sc_cur_phase;
PRIVATE char			sc_accept_int;

#ifdef DEBUG
struct sc_log {
  unsigned char stat1, stat2;
}				sc_log [SC_LOG_LEN],
				*sc_log_head = sc_log;
int				sc_spurious_int;
#endif
unsigned char
	watchdog_count,			/* watch dog counter */
	watchdog_error;

/*===========================================================================*
 *				execute_scsi_cmd			     * 
 *===========================================================================*/
PUBLIC
int
execute_scsi_cmd (args, scsi_adr)
struct scsi_args *args;
int scsi_adr;
{
  unsigned char dummy;
  message msg;

  sc_ptrs = args;			/* make pointers globally accessible */
  if (!sc_reset_done) sc_reset();
  /* TCMD has some undocumented behavior in initiator mode.  I think the
   * data bus cannot be enabled if i/o is asserted.
   */
  WR_ADR (SC_TCMD, 0);
  if (OK != sc_wait_bus_free ()) {	/* bus-free phase */
    printf ("SCSI: bus not free\n");
    return NOT_OK;
  }
  sc_cur_phase = PH_NONE;
  sc_have_msg = 0;
  if (OK != sc_select (scsi_adr))	/* select phase */
    return NOT_OK;
  watchdog_error = 0;			/* watchdog timer */
  watchdog_count = HZ;
  receive (HARDWARE, &msg);		/* isr does the rest */
  if (watchdog_error) {
    sc_reset();
    /*printf ("SCSI timeout\n");*/
    return NOT_OK;
  }
  switch (msg.m1_i1) {
    case ISR_OK:
      return OK;
    case ISR_BSYERR:
      sc_reset();
      printf ("SCSI: busy error\n");
      return NOT_OK;
    case ISR_RSTERR:
      sc_reset();
      printf ("SCSI: reset error\n");
      return NOT_OK;
    case ISR_BADPHASE:
      sc_reset();
      printf ("SCSI: NULL pointer for current phase\n");
      return NOT_OK;
    default:
      sc_reset();
      printf ("SCSI: unknown interrupt status\n");
      return NOT_OK;
  }
}

/*===========================================================================*
 *				sc_reset				     * 
 *===========================================================================*/
/*
 * Reset SCSI bus.
 */
PRIVATE
sc_reset()
{
  int i, old_int;

  WR_ADR (SC_MODE, 0);			/* get into harmless state */
  WR_ADR (SC_OUTDATA, 0);
  old_int = lock();
  WR_ADR (SC_ICMD, SC_A_RST);		/* assert RST on SCSI bus */
  i = 50;				/* wait 25 usec */
  while (i--);
  WR_ADR (SC_ICMD, 0);			/* deassert RST, get off bus */
  restore (old_int);
  sc_reset_done = 1;
}

/*===========================================================================*
 *				sc_wait_bus_free			     * 
 *===========================================================================*/
PRIVATE int
sc_wait_bus_free()
{
  int i = MAX_WAIT;

  while (i--) {
    /* Must be clear for 2 usec, so read twice */
    if (RD_ADR (SC_STAT1) & (SC_S_BSY | SC_S_SEL)) continue;
    if (RD_ADR (SC_STAT1) & (SC_S_BSY | SC_S_SEL)) continue;
    return OK;
  }
  sc_reset_done = 0;
  return NOT_OK;
}

/*===========================================================================*
 *				sc_select				     * 
 *===========================================================================*/
/* This duplicates much of the work that the interrupt routine would do on a
 * phase mismatch and, in fact, the original plan was to just do the select,
 * let a phase mismatch occur, and let the interrupt routine do the rest.
 * That didn't work because the 5380 did not reliably generate the phase
 * mismatch interrupt after selection.
 */
PRIVATE int
sc_select(adr)
int adr;
{
  int i, stat1;
  long new_ptr;

  WR_ADR (SC_OUTDATA, adr);		/* SCSI bus address */
  WR_ADR (SC_ICMD, SC_A_SEL | SC_ENABLE_DB);
  for (i = 0;; ++i) {			/* wait for target to assert SEL */
    stat1 = RD_ADR (SC_STAT1);
    if (stat1 & SC_S_BSY) break;	/* select successful */
    if (i > MAX_WAIT) {			/* timeout */
      printf ("sc_select: SEL timeout\n");
      sc_reset();
      return NOT_OK;
    }
  }
  WR_ADR (SC_ICMD, 0);			/* clear SEL, disable data out */
  WR_ADR (SC_OUTDATA, 0);
  for (i = 0;; ++i) {			/* wait for target to assert REQ */
    if (stat1 & SC_S_REQ) break;	/* target requesting transfer */
    if (i > MAX_WAIT) {			/* timeout */
      printf ("sc_select: REQ timeout\n");
      sc_reset();
      return NOT_OK;
    }
    stat1 = RD_ADR (SC_STAT1);
  }
  sc_cur_phase = (stat1 >> 2) & 7;	/* get new phase from controller */
  if (sc_cur_phase != PH_CMD) {
    printf ("sc_select: bad phase = %d\n", sc_cur_phase);
    sc_reset();
    return NOT_OK;
  }
  new_ptr = sc_ptrs->ptr[PH_CMD];
  if (new_ptr == 0) {
    printf ("sc_select: NULL command pointer\n");
    sc_reset();
    return NOT_OK;
  }
  sc_accept_int = 1;
  dma_setup (0, DMA_SCSI_CH, new_ptr, SC_DMA, 0xffff);
  WR_ADR (SC_TCMD, PH_CMD);
  WR_ADR (SC_ICMD, SC_ENABLE_DB);
  WR_ADR (SC_MODE, SC_M_BSY | SC_M_DMA);
  WR_ADR (SC_START_SEND, 0);
  return OK;
}

/*===========================================================================*
 *				scsi_interrupt				     *
 *===========================================================================*/
/* SCSI interrupt handler.
 */
PUBLIC
scsi_interrupt()
{
  unsigned char stat2, dummy;
  long new_ptr;
  int ret = ISR_NOTDONE;

  stat2 = RD_ADR (SC_STAT2);		/* get status before clearing request */

# ifdef DEBUG				/* debugging log of interrupts */
  sc_log_head->stat1 = RD_ADR (SC_STAT1);
  sc_log_head->stat2 = stat2;
  if (++sc_log_head >= sc_log + SC_LOG_LEN) sc_log_head = sc_log;
  sc_log_head->stat1 = sc_log_head->stat2 = 0xff;
# endif

  for (;;) {
    dummy = RD_ADR (SC_RESETIP);	/* clear interrupt request */
    if (!sc_accept_int ||		/* return if spurious interrupt */
        ((stat2 & SC_S_BSYERR) == 0 && (stat2 & SC_S_PHASE) == 1))
    {
#     ifdef DEBUG
        ++sc_spurious_int;
#     endif
      return;
    }
    RD_ADR (SC_MODE) &= ~SC_M_DMA;	/* clear DMA mode */
    WR_ADR (DMA_ADR + 			/* stop DMA controller */
      DMA_SCSI_CH * DMA_CH_LEN, 0);
    WR_ADR (SC_ICMD, 0);		/* disable data bus */
    if (sc_cur_phase != PH_NONE) {	/* if did DMA, save the new pointer */
      if (PH_IN (sc_cur_phase))		/* fetch new pointer from DMA cntlr */
        new_ptr = *((long *)(DMA_ADR + DMA_SCSI_CH * DMA_CH_LEN + DMA_DST));
      else new_ptr = *((long *)(DMA_ADR + DMA_SCSI_CH * DMA_CH_LEN + DMA_SRC));
      new_ptr &= 0xffffff;		/* high byte is garbage */
      if (sc_cur_phase == PH_IMSG &&	/* have message? */
        new_ptr != sc_ptrs->ptr[PH_IMSG]) sc_have_msg = 1;
      sc_ptrs->ptr[sc_cur_phase] =	/* save pointer */
        new_ptr;
    }
    if (stat2 & SC_S_BSYERR) {		/* target deasserted BSY? */
      if (sc_have_msg) ret = ISR_OK;
      else ret = ISR_BSYERR;
    } else if (!(stat2 & SC_S_PHASE)) {	/* if phase mismatch, setup new phase */
      sc_cur_phase = 			/* get new phase from controller */
        (RD_ADR (SC_STAT1) >> 2) & 7;
      new_ptr = sc_ptrs->ptr[sc_cur_phase];
      if (new_ptr == 0) ret = ISR_BADPHASE;
      else {
        WR_ADR (SC_TCMD, sc_cur_phase);	/* write new phase into TCMD */
        if (PH_IN (sc_cur_phase)) {	/* set DMA controller */
          dma_setup (1, DMA_SCSI_CH, SC_DMA, new_ptr, 0xffff);
          RD_ADR (SC_MODE) |= SC_M_DMA;
          WR_ADR (SC_START_RCV, 0);	/* tell SCSI to start DMA */
	} else {
          dma_setup (0, DMA_SCSI_CH, new_ptr, SC_DMA, 0xffff);
	  RD_ADR (SC_MODE) |= SC_M_DMA;
	  WR_ADR (SC_ICMD, SC_ENABLE_DB);
	  WR_ADR (SC_START_SEND, 0);
	}
      }
    } else ret = ISR_RSTERR;
    if (ret != ISR_NOTDONE) {		/* if done, send message to task */
      WR_ADR (SC_MODE, 0);		/* clear monbsy, dma */
      scsi_int_mess.m_type = DISKINT;
      scsi_int_mess.m1_i1 = ret;
      interrupt (SCSI, &scsi_int_mess);
      sc_accept_int = 0;
      break;				/* reti re-enables ints */
    }
    if (0 == ((stat2 =			/* check for another interrupt */
      RD_ADR (SC_STAT2)) & SC_S_IRQ)) 
    {
      break;
    }
  }
}
@EOF

chmod 666 scsi.c

echo x - scsi_hd.c
cat >scsi_hd.c <<'@EOF'
/* NS32K Minix SCSI hard disk driver
 * Bruce Culbertson
 * 18 June 1989
 */

/* The driver supports two operations: read a block and
 * write a block.  It accepts two messages, one for reading and one for
 * writing, both using message format m2 and with the same parameters:
 *
 *    m_type      DEVICE    PROC_NR     COUNT    POSITION  ADDRESS
 * ----------------------------------------------------------------
 * |  DISK_READ | device  | proc nr |  bytes  |  offset | buf ptr |
 * |------------+---------+---------+---------+---------+---------|
 * | DISK_WRITE | device  | proc nr |  bytes  |  offset | buf ptr |
 * ----------------------------------------------------------------
 *
 */

#include "../h/const.h"
#include "../h/type.h"
#include "../h/callnr.h"
#include "../h/com.h"
#include "../h/error.h"
#include "const.h"
#include "type.h"
#include "glo.h"
#include "proc.h"
#include "../h/32k.h"

/* These parameters are for a Seagate ST277N
 */
#define MAX_SCSI_RETRIES	6
#define	SEC_PER_CYL	155
#define NR_SEC		126790
#define NR_BLK		((NR_SEC*BYT_PER_SEC)/BLOCK_SIZE)
#define NR_CYL		(NR_SEC/SEC_PER_CYL)
#define SEC_PER_TRK	26
#define BYT_PER_SEC	512
#define SEC_PER_BLK	(BLOCK_SIZE/BYT_PER_SEC)
#define BLK_PER_TRK	(SEC_PER_TRK/SEC_PER_BLK)
#define BIG_PART_CYL	406
#define BIG_PART	/* large partition, 31465 blocks */\
	(BIG_PART_CYL*SEC_PER_CYL*BYT_PER_SEC/BLOCK_SIZE)
#define BOOT_PART_CYL	/* 6 cyl */\
	(NR_CYL - 2*BIG_PART_CYL)
#define BOOT_PART	/* boot partition, 465 blocks */\
	(BOOT_PART_CYL*SEC_PER_CYL*BYT_PER_SEC/BLOCK_SIZE)

PRIVATE message sc_msg;

#define U8	unsigned char

#define CMD_IX		2
#define CMD_LEN		12		/* longest SCSI command */
#define CMD_SENSE	0x03
#define CMD_READ	0x28
#define CMD_WRITE	0x2a
PRIVATE U8		cmd_buf[CMD_LEN];

#define SENSE_LEN 	24		/* extended sense length */
#define SENSE_KEY	2
#define NO_SENSE	0
#define RECOVERY_ERR	1
#define UNIT_ATTN	6
#define ADD_SENSE_CODE	12
#define SENSE_RST	0x29
PRIVATE	U8		sense_buf[SENSE_LEN];

#define CHECK_CONDITION	2
#define STAT_IX		3
PRIVATE U8		stat_buf[1];
#define IMSG_IX		7
PRIVATE U8		msg_buf[1];

#define ODATA_IX	0
#define IDATA_IX	1
PRIVATE struct scsi_args scsi_args;

/* Partition table.  This is not completely general in that the interleave
 * funtion does not work unless there are an even number of blocks per
 * track and the interleave is relatively prime to the number of blocks
 * per track.  However, you should be able to find an acceptable combination
 * for any drive.  Also, might be better to be MS-DOS compatible.
 */
struct partition_tbl {			/* partitions */
  long		start_blk;		/* in 1024 byte blocks */
  long		len;			/* in 1024 byte blocks */
  unsigned char scsi_adr;		/* SCSI address */
  short		sector_per_blk;		/* sectors per BLOCK_SIZE */
  short		blk_per_track;
  short		interleave;
};

PRIVATE
struct partition_tbl part_tbl [] = {
  {0,			NR_BLK,	   SC_HD_ADR, SEC_PER_BLK, SEC_PER_CYL, 1},
  {0, 			BOOT_PART, SC_HD_ADR, SEC_PER_BLK, SEC_PER_CYL, 1},
  {BOOT_PART,		BIG_PART,  SC_HD_ADR, SEC_PER_BLK, SEC_PER_CYL, 1},
  {BOOT_PART+BIG_PART,	BIG_PART,  SC_HD_ADR, SEC_PER_BLK, SEC_PER_CYL, 2},
};
#define NR_DRIVES	(sizeof (part_tbl) / sizeof (struct partition_tbl))

/*===========================================================================*
 *				scsi_task				     * 
 *===========================================================================*/
PUBLIC scsi_task()
{
/* Main program of the scsi hard disk driver task. */
  int r, caller, proc_nr;

  /* Here is the main loop of the disk task.  It waits for a message, carries
   * it out, and sends a reply.
   */
  for (;;) {
	/* First wait for a request to read or write a disk block. */
	receive(ANY, &sc_msg);	/* get a request to do some work */
	if (sc_msg.m_source < 0)
		panic("scsi disk task got message from ", sc_msg.m_source);
	caller = sc_msg.m_source;
	proc_nr = sc_msg.PROC_NR;

	/* Now carry out the work. */
	switch(sc_msg.m_type) {
	    case DISK_READ:	r = sc_rdwt(&sc_msg);	break;
	    case DISK_WRITE:	r = sc_rdwt(&sc_msg);	break;
	    default:		r = EINVAL;		break;
	}

	/* Finally, prepare and send the reply message. */
	sc_msg.m_type = TASK_REPLY;	
	sc_msg.REP_PROC_NR = proc_nr;
	sc_msg.REP_STATUS = r;	/* # of bytes transferred or error code */
	send(caller, &sc_msg);	/* send reply to caller */
  }
}

/*===========================================================================*
 *				sc_rdwt					     * 
 *===========================================================================*/
PRIVATE int sc_rdwt(m_ptr)
message *m_ptr;
{
/* Carry out a read or write request from the disk. */
  int drive, track_block, retries;
  long virt_block, phys_block, sector;
  struct partition_tbl *part;
  U8 *p;

  /* Decode the message parameters. */
  drive = m_ptr->DEVICE;
  if (drive < 0 || drive >= NR_DRIVES) return(EIO);
  part = &part_tbl[drive];

  /* convert virtual block to physical block and sector */
  virt_block = m_ptr->POSITION / BLOCK_SIZE;
  if (virt_block >= part->len) return EOF;
  track_block = virt_block % part->blk_per_track;
  phys_block = virt_block - track_block +
	(track_block * part->interleave) % part->blk_per_track +
	part->start_blk;
  sector = phys_block * part->sector_per_blk;

  for (retries = 0; retries < MAX_SCSI_RETRIES; ++retries) {
    p = cmd_buf;		/* build SCSI command */
    *p++ = (m_ptr->m_type == DISK_READ)? CMD_READ: CMD_WRITE;
    *p++ = 0;
    *p++ = (sector >> 24) & 0xff;
    *p++ = (sector >> 16) & 0xff;
    *p++ = (sector >> 8) & 0xff;
    *p++ = (sector >> 0) & 0xff;
    *p++ = 0;
    *p++ = 0;
    *p++ = part->sector_per_blk;
    *p = 0;
    scsi_args.ptr[CMD_IX] = (long)cmd_buf;
    scsi_args.ptr[STAT_IX] = (long)stat_buf;
    scsi_args.ptr[IMSG_IX] = (long)msg_buf;
    if (m_ptr->m_type == DISK_READ) {
      scsi_args.ptr[IDATA_IX] = (long)(m_ptr->ADDRESS);
      scsi_args.ptr[ODATA_IX] = 0;
    } else {
      scsi_args.ptr[ODATA_IX] = (long)(m_ptr->ADDRESS);
      scsi_args.ptr[IDATA_IX] = 0;
    }
    if (OK != execute_scsi_cmd (&scsi_args, part->scsi_adr)) {
      /* Probably a major problem, SCSI device or bus dead -- no retry */
      /* now could be just timeout */
      /* printf ("SCSI %s command failed sector=%d\n",
        m_ptr->m_type == DISK_READ? "READ": "WRITE", sector); */
      continue;
    }
    if (*stat_buf == 0)
      /* Success -- this should be the usual case */
      return BLOCK_SIZE;
    if (*stat_buf != CHECK_CONDITION) {
      /* do not know how to handle this so return error */
      printf ("SCSI device returned unknown status: %d\n", *stat_buf);
      continue;
    }
    /* Something funny happened, need to execute request-sense command
     * to learn more.
     */
    if (OK == get_sense(part->scsi_adr))
      /* Something funny happened, but the device recovered from it and
       * the command succeeded.
       */
      return BLOCK_SIZE;
  }
  printf ("SCSI %s, sector %d failed even after retries\n",
    m_ptr->m_type == DISK_READ? "READ": "WRITE", sector);
  return EIO;
}

/*===========================================================================*
 *				get_sense				     * 
 *===========================================================================*/
/* Execute a "request sense" SCSI command and check results.  When a SCSI
 * command returns CHECK_CONDITION, a request-sense command must be executed.
 * A request-sense command provides information about the original command.
 * The original command might have succeeded, in which case it does not
 * need to be retried and OK is returned.  Examples: read error corrected
 * with error correction code, or error corrected by retries performed by
 * the SCSI device.  The original command also could have failed, in
 * which case NOT_OK is returned.
 */
#define LOGICAL_ADR	\
  (sense_buf[3]<<24 | sense_buf[4]<<16 | sense_buf[5]<<8 | sense_buf[6])

PRIVATE int
get_sense (scsi_adr)
int scsi_adr;
{
  U8 *p;

  p = cmd_buf;				/* build SCSI command */
  *p++ = CMD_SENSE;
  *p++ = 0;
  *p++ = 0;
  *p++ = 0;
  *p++ = SENSE_LEN;
  *p = 0;
  scsi_args.ptr[IDATA_IX] = (long)sense_buf;
  scsi_args.ptr[ODATA_IX] = 0;
  scsi_args.ptr[CMD_IX] = (long)cmd_buf;
  scsi_args.ptr[STAT_IX] = (long)stat_buf;
  scsi_args.ptr[IMSG_IX] = (long)msg_buf;
  if (OK != execute_scsi_cmd (&scsi_args, scsi_adr)) {
    printf ("SCSI SENSE command failed\n");
    return NOT_OK;
  }
  if (*stat_buf != 0) {
    printf ("SCSI SENSE returned wrong status %d\n", *stat_buf);
    return NOT_OK;
  }
  switch (sense_buf[SENSE_KEY] & 0xf) {
    case NO_SENSE:
    case UNIT_ATTN:			/* reset */
      return NOT_OK;			/* must retry command */
    case RECOVERY_ERR:
#if 0
      /* eventually, we probably do not want to hear about these. */
      printf (
	"SCSI ok with recovery, code 0x%x, logical address 0x%x\n",
	sense_buf[ADD_SENSE_CODE], LOGICAL_ADR);
#endif
      return OK;			/* orig command was ok with recovery */
    default:
      printf (
	"SCSI failure, key 0x%x, code 0x%x, log adr 0x%x, sense buf 0x%x\n",
	sense_buf[SENSE_KEY], sense_buf[ADD_SENSE_CODE],
	LOGICAL_ADR, sense_buf);
      return NOT_OK;			/* orig command failed */
  }
}
@EOF

chmod 664 scsi_hd.c

exit 0

From owner-pc532%daver@mips.com Tue Feb 27 16:59:49 1990
Flags: 000000000001
Reply-To: pc532@daver.bungi.com
Date: Tue, 27 Feb 90 11:47:38 pst
From: Bruce Culbertson <culberts@hplwbc.hpl.hp.com>
To: pc532@daver.bungi.com
Subject: Re:  ROM Debugger -- download command..

John L. Connin <johnc%manatee%uunet@daver> writes:
> Dave, what data format / protocol does the ROM debugger 'download' command 
> expect ??   

Here is the download program which I run at the other end of the
serial line -- in my case, on an AT clone.  The download protocol
is explained in the comments in the program.  I just recently added
the download command to the monitor so let me know if you have
problems with it or if you wish it worked differently.

Bruce Culbertson
----------------------------------------------------------------------
/* MS-DOS Program for downloading to the NSC32000 Monitor.  Use this as a
 * template for writing downloaders for other OS's.  Compile the MS-DOS
 * version with the Microsoft C compiler.
 * 
 * Bruce Culbertson  18 February 1990
 */

/* Instructions for use:
 *
 * machine      prompt, command, etc.
 * -------------------------------------------------------------------
 * 32000	Command (? for help): download <address>
 * MS-DOS	[exit terminal emulator]
 * MS-DOS	C> <this program> <file name to download>
 * MS-DOS	[re-enter terminal emulator]
 * 32000	[hit return to get status of download]
 * 32000	Command (? for help): ...
 *
 * At any point you can send control-C (e.g. using your terminal emulator)
 * to the 32000 monitor to abort the download and return to the monitor
 * prompt.
 */

/* Download protocol:
 *
 * <start mark> <length> <data> <CRC>
 *
 * Below, the sending machine is called SRC, receiving machine is DST.
 * Eight bit characters are used.
 *
 * Control-C (0x03) aborts the transfer.  This capability is nice
 * to have if, for example, length is garbled and the DST expects
 * billions of characters.  Since any byte of <length>, <data>,
 * or <CRC> could be control-C, we need to have a quote character.
 * I use ESC (0x1b).  Thus, control-C and ESC are sent as
 * {0x1b 0x03} and {0x1b 0x1b}, respectively.
 *
 * Start mark:
 *   This is a colon.  When SRC begins sending, DST loops until it sees
 *   the start mark.  Thus, if spurious characters are sent as the
 *   user switches from terminal emulator to download program on SRC,
 *   DST can ignore them.
 *
 * Length:
 *   Four bytes, least significant first.  The length is number of
 *   data bytes to be transfered, not including quote characters.
 *   The two CRC bytes are also not included in the length.
 *
 * Data:
 *   A byte is sent as a byte, with quoting if necessary.
 *
 * CRC:
 *   Two bytes, least significant first.  Use CCITT CRC generator
 *   polynomial (x^16 + x^12 + x^5 + 1).  Compute on data only (not
 *   length or start) and exclude quotes.  (This is the same CRC
 *   as computed by Minix's CRC command.)
 */

#include <stdio.h>
#include <fcntl.h>

#ifdef MSDOS
#  define OPEN_FLAGS    (O_RDONLY | O_BINARY)
#else
#  define OPEN_FLAGS    O_RDONLY
#endif

#define CCITT_GEN	0x11021		/* x^16 + x^12 + x^5 + 1 */
#define BUFSZ		0x1000
#define ESC		0x1b
#define CTL_C		0x03
#define DEFAULT_PORT    1

char buf[BUFSZ];
int port_num = DEFAULT_PORT;
int port;
long write_data(), write_header();

main (argc, argv)
int argc;
char **argv;
{
  int fd;
  long crc, len;

  if (argc == 3) {
    if (1 != sscanf (argv[2], "%d", &port_num)) {
      fprintf (stderr, "Bad serial port, use 1 or 2\n");
      exit (-1);
    }
    --argc;
  }
  if (argc != 2) {
    fprintf (stderr, "usage: %s <file> [<serial port>]\n", argv[0]);
    exit (-1);
  }
  if (port_num == 1) port = 0x3f8;
  else if (port_num == 2) port = 0x2f8;
  else {
    fprintf (stderr, "Bad serial port, use 1 or 2\n");
    exit (-1);
  }
  if (0 > (fd = open (argv[1], OPEN_FLAGS))) {
    fprintf (stderr, "can not open %s\n", argv[1]);
    exit (-1);
  }
  init_port();
  len = write_header (fd);
  crc = write_data (fd);
  write_crc (crc);
  printf ("Length=%ld CRC=%ld\n", len, crc);
  restore_port();
  exit (0);
}

/* Write header.  Format is a colon followed by four byte length,
 * LSB first.  Length is the number of data bytes after quotes are
 * removed.
 */
long
write_header (fd)
int fd;
{
  long len, lseek();

  if (0 == (len = lseek (fd, 0L, 2))) {
    fprintf (stderr, "file length is zero\n");
    exit (-1);
  }
  lseek (fd, 0L, 0);
  write_ch (':');
  write_ch ((int)((len >> 0) & 0xff));
  write_ch ((int)((len >> 8) & 0xff));
  write_ch ((int)((len >> 16) & 0xff));
  write_ch ((int)((len >> 24) & 0xff));
  return len;
}

/* Write data.
 */
long
write_data (fd)
int fd;
{
  long len, crc = 0, update_crc();
  char *p;

  for (;;) {
    len = read (fd, buf, BUFSZ);
    if (-1 == len) {
      fprintf (stderr, "read failed\n");
      exit (-1);
    }
    if (len == 0) break;
    for (p = buf; p < buf + len; ++p) {
      write_ch (*p);
      crc = update_crc (crc, *p);
    }
  }
  return crc;
}

/* Write two CRC bytes, LSB first.
 */
write_crc (crc)
long crc;
{
  write_ch ((int)((crc >> 0) & 0xff));
  write_ch ((int)((crc >> 8) & 0xff));
}

/* Given old CRC and new character, return new CRC.  Uses standard
 * CCITT CRC generator polynomial.
 */
long
update_crc (crc, ch)
long crc;
int ch;
{
  int i;

  for (i = 0x80; i; i >>= 1) {
    crc = (crc << 1) | (i & ch? 1: 0);
    if (crc & 0x10000) crc ^= CCITT_GEN;
  }
  return crc;
}

/* Output a character.  If it is a CLT_C or ESC, then quote (preceed)
 * it with a ESC.
 */
write_ch (c)
int c;
{
  if (c == ESC || c == CTL_C)
    putch (ESC);
  putch (c);
}

#ifdef MSDOS
/* Write hardware directly since BIOS and DOS are not reliable.
 */
#define COM_WR      0
#define COM_RD      0
#define COM_IER     1
#define COM_CTL     3
#define COM_STAT    5
#define COM_CTL_VAL 3                   /* 8 bits, 1 stop, no parity */
#define COM_IER_VAL 0                   /* interrupts off */
#define COM_TX_RDY  0x20

int old_control, old_ier;

/* Output a character to the serial port.
 */
putch (c)
int c;
{
  int stat;
  
  for (;;) {
    stat = inp (port + COM_STAT);
    if (stat & COM_TX_RDY) break;
  }
  outp (port + COM_WR, c);
}

/* Initialize serial port and save old values.  Assume baud rate
 * already set.
 */
init_port()
{
  old_control = inp (port + COM_IER);
  old_ier = inp (port + COM_CTL);
  outp (port + COM_CTL, COM_CTL_VAL);
  outp (port + COM_IER, COM_IER_VAL);
}

/* Restore serial port to old configuration.
 */
restore_port()
{
  outp (port + COM_CTL, old_control);
  outp (port + COM_IER, old_ier);
}
#else
putch (c) {putchar (c);}
init_port(){}
restore_port(){}
#endif

From shiva!bert Wed Feb 28 09:52:18 1990
Flags: 000000000002
Date: Wed, 28 Feb 90 09:40:20 EST
From: shiva!bert (Bert Vincent)
To: budd@bu.edu
Subject: MINIX 1.5.0 is alive

I successfully made a 1.5.0 boot floppy last night. Comes up in protected
mode on my '386 and runs nicely. Many improvements have been made, especially
nice ones include the speedup of ramdisk loading and a more elaborate boot
menu (allows selection of root file system).  Several utilities had trouble
compiling, and the diffs for "ls" and "more" were too big for patch to grok
so i had to edit by hand.  I have no idea why ast sent out diffs which were
actually bigger than the .c files would have been.

I will save you a copy, of course. I'll try to archive the whole works.

	-bert

