/******************************************************************************
 * Copyright (c) ETSI 2017.
 *
 * This file is subject to copyrights owned by ETSI. Non-exclusive permission
 * is hereby granted, free of charge, to copy, reproduce and amend this file
 * under the following conditions: It is provided "as is", without warranty of any
 * kind, expressed or implied.
 * 
 * ETSI shall never be liable for any claim, damages, or other liability arising
 * from its use or inability of use.This permission does not apply to any documentation
 * associated with this file for which ETSI keeps all rights reserved. The present
 * copyright notice shall be included in all copies of whole or part of this
 * file and shall not imply any sub-license right.
 *
 * Modified by: Adrien Kirjak
 *
 ** @version  0.0.1
 ** @purpose  1:16.2.1, Ensure that altsteps  are correctly handled for dynamically mapped ports
 ** @verdict  pass accept, ttcn3verdict:pass
 ***************************************************/

// Mycompport A is dynamically mapped
module Sem_160201_invoking_altsteps_004{ 

    type port Sem_160201_004_loopbackPort message {
	  inout integer
	}
	
	type component GeneralComp
	{
		 timer tc_timer := 0.1;
		 port Sem_160201_004_loopbackPort MycomportA
	}

	type component MyTestSystemInterface
	{
	 	port Sem_160201_004_loopbackPort messagePort
	}
	
	altstep AltStep1() runs on GeneralComp { 
	  
		 [] tc_timer.timeout {
		    MycomportA.clear;
		    setverdict(pass);
		 }
	}
	
	
	// MyTestSystemInterface is the test system interface
	testcase TC_Sem_160201_invoking_altsteps_004() runs on GeneralComp system MyTestSystemInterface {
	 	
		map(mtc:MycomportA, system:messagePort);

	 	MycomportA.send(2);
	 	tc_timer.start;

	 	unmap(mtc:MycomportA, system:messagePort);

		alt {
		 	[] AltStep1();
		}
	}

	control{
		execute(TC_Sem_160201_invoking_altsteps_004());
	}
}
