/******************************************************************************
 * Copyright (c) ETSI 2017.
 *
 * This file is subject to copyrights owned by ETSI. Non-exclusive permission
 * is hereby granted, free of charge, to copy, reproduce and amend this file
 * under the following conditions: It is provided "as is", without warranty of any
 * kind, expressed or implied.
 * 
 * ETSI shall never be liable for any claim, damages, or other liability arising
 * from its use or inability of use.This permission does not apply to any documentation
 * associated with this file for which ETSI keeps all rights reserved. The present
 * copyright notice shall be included in all copies of whole or part of this
 * file and shall not imply any sub-license right.
 *
 * Modified by: Adrien Kirjak
 *
 ** @version  0.0.1
 ** @purpose  1:21.1.2, Ensure that unmap operation with all ports of a component works correctly
 ** @verdict  pass accept, ttcn3verdict:pass
 ***************************************************/

// The following requirements are tested:
// To ease ... map operations related to all ... mappings of a component ..., it is
// allowed to use ... unmap operations with one argument only. This one argument 
// specifies one side of the connections to be ... unmapped. The all port keyword 
// can be used to denote all ports of a component.

module Sem_210102_disconnect_and_unmap_operations_007 {
  
    type port P message {
        inout integer
    }

    type component GeneralComp
    {
        port P p1, p2;
    }
    
	function checkPortMapped(boolean p_stateActive, P p_port)
	{
		if(p_port.checkstate("Mapped") xor not p_stateActive) {
			setverdict(pass);			
		} else {
			setverdict(fail);
		}
	}
	function checkMapped(boolean p_stateActive) runs on GeneralComp
	{
		checkPortMapped(p_stateActive, p1);
		checkPortMapped(p_stateActive, p2);
	}
	
    testcase TC_Sem_210102_disconnect_and_unmap_operations_007() runs on GeneralComp system GeneralComp {
		var GeneralComp v_ptc1 := GeneralComp.create;

		map(self:p1, system:p1);
		map(self:p2, system:p2);
		map(v_ptc1:p1, system:p1);
		map(v_ptc1:p2, system:p2);

		unmap(v_ptc1:all port);

		// verity that ports are really unmapped
        checkMapped(true); // still mapped to system:p1 and system:p2
        v_ptc1.start(checkMapped(false)); // no active mapping
		all component.done;
    }
    control{
        execute(TC_Sem_210102_disconnect_and_unmap_operations_007());
    }
}

