/******************************************************************************
 * Copyright (c) ETSI 2017.
 *
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 * is hereby granted, free of charge, to copy, reproduce and amend this file
 * under the following conditions: It is provided "as is", without warranty of any
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 * 
 * ETSI shall never be liable for any claim, damages, or other liability arising
 * from its use or inability of use.This permission does not apply to any documentation
 * associated with this file for which ETSI keeps all rights reserved. The present
 * copyright notice shall be included in all copies of whole or part of this
 * file and shall not imply any sub-license right.
 *
 * Modified by: Adrien Kirjak
 *
 ** @version  0.0.1
 ** @purpose  1:26, Ensure that for loop constructs in the control part are accepted.
 ** @verdict  pass accept, noexecution
 *****************************************************************/

module Syn_26_ModuleControl_004 {

	type component GeneralComp {}

	testcase TC_Syn_26_ModuleControl_004() runs on GeneralComp 
	{ setverdict(pass);	}

	control{
		for (var integer v_i:=0; v_i < 10; v_i := v_i + 1) {
			// do something
		}

		execute(TC_Syn_26_ModuleControl_004()); //not part of the test
	}

}
